Chun-Hu Cheng

Dr. Chun-Hu Cheng

Department of Mechatronic Engineering, National Taiwan Normal University, Taipei 10610, Taiwan
orcid

Research Focus & Metrics

Academic Career Length

18Years (2009-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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6 February 2019 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
KRKadiyam Rajshekar
Kadiyam Rajshekar
HHHsiao-Hsuan Hsu
Hsiao-Hsuan Hsu
KKKoppolu Uma Mahendra Kumar
Koppolu Uma Mahendra Kumar
PSP. Sathyanarayanan
P. Sathyanarayanan
VVV. Velmurugan
V. Velmurugan
KDKannadassan Dhanaraj
Kannadassan Dhanaraj
With experimental and numerical simulation, we report the origin of the performance enhancement in p-type SnO thin-film transistors (TFTs) due to fluorine plasma treatment (FPT). To study the effect of fluorination, using the reactive-ion-etching process, the devices are treated at various plasma powers upto 60 W. It is observed, through X-ray photoelectron spectroscopy and XRD measurements, that the plasma fluorination modifies the defect/trap states of SnO channel and SnO/HfO 2 interface. These effects are introduced through density of state (DOS) model for SnO in numerical simulations, to understand the routes of electrical performance improvement. It is observed that the attributes of donor-like band-tail state and acceptor-like Gaussian defect states (Sn vacancies) are modified in overall DOS due to plasma fluorination. The treated device shows excellent electrical performances with high ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio of ~10 7 and low substhreshold swing of ~ 100 mV/dec and field-effect mobility ( $\mu _{\text {FE}}$ ) of 2.13 cm 2 V −1 s −1 .

29 December 2016 in IEEE Electron Device Letters
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Journal Article
Closed access
PCPo-Chun Chen
Po-Chun Chen
YCYu-Chien Chiu
Yu-Chien Chiu
GLGuan-Lin Liou
Guan-Lin Liou
ZZZhi-Wei Zheng
Zhi-Wei Zheng
CCChun-Hu Cheng
Chun-Hu Cheng
Yung-Hsien WuYung-Hsien Wu
Yung-Hsien Wu
This letter reports on a tin oxide (SnO) thin-film transistor (TFT) with p-type conduction that uses aluminum (Al) doping in the SnO active channel layer. Performance enhancements were further achieved by applying fluorine plasma treatment on the p-type Al-doped SnO channel layer. The effects of the fluorine plasma treatment were also investigated.By tuning the power of the fluorine plasma treatment on the p-type Al-doped SnO channel layer, the optimal TFT device showed a very high on/off current ratio of 2.58×106 and a low threshold swing of 174 mV/decade, which could be attributed to the passivation effect of the plasma fluorination on the dominant donor-like traps at the SnO/HfO2 interface, as reflected by the suppression of the hysteresis phenomenon, the low density of interface traps, and the small subthreshold swing. The results indicate that the p-type Al-doped SnO TFT device with fluorine plasma treatment has considerable potential for application in future high-performance displays.

23 September 2013 in Solid-State Electronics
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Journal Article
Closed access
HHHsiao-Hsuan Hsu
Hsiao-Hsuan Hsu
CCChun-Yen Chang
Chun-Yen Chang
CCChun-Hu Cheng
Chun-Hu Cheng
SYShu-Hung Yu
Shu-Hung Yu
CSChing-Yuan Su
Ching-Yuan Su
CSChung-Yen Su
Chung-Yen Su

12 January 2017 in Physica Status Solidi (RRL) – Rapid Research Letters
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Journal Article
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YCYu-Chien Chiu
Yu-Chien Chiu
CCChun-Hu Cheng
Chun-Hu Cheng
CCChun-Yen Chang
Chun-Yen Chang
YTYing-Tsan Tang
Ying-Tsan Tang
MCMin-Cheng Chen
Min-Cheng Chen

22 November 2018 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
CCChun-Hu Cheng
Chun-Hu Cheng
CFChia-Chi Fan
Chia-Chi Fan
CTChun-Yuan Tu
Chun-Yuan Tu
HHHsiao-Hsuan Hsu
Hsiao-Hsuan Hsu
CCChun-Yen Chang
Chun-Yen Chang
For the first time, we successfully demonstrated the dopant-free HfO 2 negative capacitance (NC) transistor featuring a low gate-overdrive voltage and a nearly hysteresis-free sub-40 mV/dec swing. These excellent performances can be ascribed to the reduction of the monoclinic phase suppressed with the thickness scaling and gate stress engineering favorably rearranging oxygen vacancies to boost orthorhombic phase transition. The highly scalable and dopant-free NC transistor shows the potential for the application of advanced CMOS technology.

15 June 2017 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
YCYu-Chien Chiu
Yu-Chien Chiu
CCChun-Hu Cheng
Chun-Hu Cheng
GLGuan-Lin Liou
Guan-Lin Liou
CCChun-Yen Chang
Chun-Yen Chang
In this brief, we reported a ferroelectric versatile memory with strained-gate engineering. The versatile memory with high-strain-gate showed a >40% improvement on ferroelectric hysteresis window, compared to low-strain case. The high compressive stress induced from high nitrogen-content TaN enhances monoclinic-to-orthorhombic phase transition to reach stronger ferrolectric polarization and lower depolarization field. The versatile memory featuring ferroelectric negative capacitance exhibited excellent transfer characteristics of the sub-60-mVdec subthreshold swing, ultralow off-state leakage of <;1fA/μm and >10 8 on/off current ratio. Furthermore, the ferroelectric versatile memory can be switched by ±5 V under 20-ns speed for a long endurance cycling (~10 12 cycles). The low-power operation can be ascribed to the amplification of the surface potential to reach the strong inversion and fast domain polarization at the correspondingly low program/erase voltages.