A pipelined noise-shaping successive approximation register (NS-SAR) ADC with 1–2 multistage noise-shaping (MASH) structure is presented. Two-stage pipelined structure consisting of 5 bit NS-SAR and 4 bit NS-SAR quantizers enables 3rd-order noise-shaping. A single operational transconductance amplifier (OTA) is shared by an integrator for noise-shaping and a residue amplifier for pipelining to maximize the power efficiency. The measured dynamic range (DR) is 84.6 dB when the sampling rate is 83.3 MS/s, bandwidth is 4 MHz, and power consumption is 3.5 mW showing Schreier figure-of-merit (FoM _S,DR ) of 175.2 dB. The proposed ADC structure greatly relaxes design requirement of each SAR quantizer and can achieve high resolution and wide bandwidth with good power efficiency.

A 10-Gb/s throughput all-digital true-random-number generator (TRNG) is introduced. The TRNG comprises an entropy source based on a StrongARM latch comparator and a post-processing block using the middle square method (MSM). The comparator is fully digital, so the entropy source can operate at a high frequency with robustness to process-voltage-temperature (PVT) variation. The MSM post-processing effectively removes any colored noise from the entropy source. The randomness of the MSM post-processing is evaluated by machine-learning resistance. The prototype TRNG is fabricated in a 28-nm CMOS process, and the measurement shows a 10-Gb/s throughput with a power efficiency of 0.121 pJ/bit. The output random bit stream passed all the NIST SP 800–22 and NIST SP 800-90B tests under various operating conditions with a maximum Shannon entropy of 0.999999999997.

A CMOS (Complementary metal-oxide-semiconductor) Hall sensor with low power consumption and simple structure is introduced. The tiny magnetic signal from Hall device could be detected by a high-resolution delta-sigma ADC in presence of offset and flickering noise. Also, the offset as well as the flickering noise are effectively suppressed by the current spinning technique combined with double sampling switches of the ADC. The double sampling scheme of the ADC reduces the operating frequency and helps to reduce the power consumption. The prototype Hall sensor is fabricated in a 0.18-µm CMOS process, and the measurement shows detection range of ±150 mT and sensitivity of 110 µV/mT. The size of active area is 0.7 mm², and the total power consumption is 4.9 mW. The proposed system is advantageous not only for low power consumption, but also for small sensor size due to its simplicity.

This article describes a fourth-order continuous-time (CT) bandpass (BP)- $\Delta \Sigma $ capacitance-to-digital converter (CDC) for full-CMOS sensors having ultrahigh-resolution and high-energy efficiency. To improve the resolution of $\Delta \Sigma $ CDC, a CT instead of a discrete-time (DT) operation is employed to overcome a thermal noise limitation. Moreover, a BP- $\Delta \Sigma $ modulator is used to save power consumption compared to lowpass (LP) or highpass (HP)- $\Delta \Sigma $ Ms. In addition, a charge-domain digital-to-analog converter (DAC) at the input stage of the $\Delta \Sigma M$ is proposed for low thermal noise and simplicity. An inverter-based amplifier is used for low power consumption and gain boosting circuit is added to increase dc gain of the amplifier. Implemented in $0.18~\mu \text{m}$ CMOS, the proposed CDC achieves a ultrahigh-resolution of 3.68 aFrms and the highest Schreier figure-of-merit (FoMS) of 183 dB which is 3.3 dB improvement over the recent state-of-the-art CDCs.

This paper presents a small-sized, low-power gas sensor system combining a high-electron-mobility transistor (HEMT) device and readout integrated circuit (ROIC). Using a semiconductor-based HEMT as a gas-sensing device, it is possible to secure high sensitivity, reduced complexity, low power, and small size of the ROIC sensor system. Unlike existing gas sensors comprising only HEMT elements, the proposed sensor system has both an ROIC and a digital controller and can control sensor operation through a simple calibration process with digital signal processing while maintaining constant performance despite variations. The ROIC mainly consists of a transimpedance amplifier (TIA), a negative-voltage generator, and an analog-to-digital converter (ADC) and is designed to match a minimum target detection unit of 1 ppm for hydrogen. The prototype ROIC for the HEMT presented herein was implemented in a 0.18 µm complementary metal–oxide–semiconductor (CMOS) process. The total measured power consumption and detection unit of the proposed ROIC for hydrogen gas were 3.1 mW and 2.6 ppm, respectively.

A time-interleaved noise-shaping (TINS) successive approximation register (SAR) analog-to-digital converter (ADC) for wide bandwidth, high resolution, and low power consumption is proposed. A fully passive switched-capacitor integrator based on a single capacitor and a single-input comparator is adopted in the proposed three-channel structure for 1st-order noise shaping with low power consumption. The SAR conversion is split into coarse and fine conversions to allow noise shaping in the time-interleaved structure to maximize the bandwidth. In addition, a dynamic weight averaging method for three channels is introduced to suppress the effect of capacitor mismatch. The prototype ADC is implemented in a 28-nm CMOS process and achieves a signal-tonoise and distortion ratio of 65.37 dB, a bandwidth of 75 MHz at a sampling rate of 600 MHz, and a power consumption of 4.015 mW with a 1.1 V supply. A Walden figure-of-merit (FoM) of 17.65 fJ/conv.-step and a Schreier FoM of 168.1 dB show that the proposed TINS SAR ADC improves speed and accuracy with good power efficiency.