This article presents several design techniques to fabricate micro-electro-mechanical systems (MEMS) using standard complementary metal-oxide semiconductor (CMOS) processes. They were applied to fabricate high yield CMOS-MEMS shielded Lorentz-force magnetometers (LFM). The multilayered metals and oxides of the back-end-of-line (BEOL), normally used for electronic routing, comprise the structural part of the MEMS. The most important fabrication challenges, modeling approaches and design solutions are discussed. Equations that predict the Q factor, sensitivity, Brownian noise and resonant frequency as a function of temperature, gas pressure and design parameters are presented and validated in characterization tests. A number of the fabricated magnetometers were packaged into Quad Flat No-leads (QFN) packages. We show this process can achieve yields above 95 % when the proper design techniques are adopted. Despite CMOS not being a process for MEMS manufacturing, estimated performance (sensitivity and noise level) is similar or superior to current commercial magnetometers and others built with MEMS processes. Additionally, typical offsets present in Lorentz-force magnetometers were prevented with a shielding electrode, whose efficiency is quantified. Finally, several reliability test results are presented, which demonstrate the robustness against high temperatures, magnetic fields and acceleration shocks.

A first reported complementary metal‐oxide semiconductor (CMOS)‐integrated acceleration sensor obtained through isotropic inter‐metal dielectric (IMD) etching of a back‐end‐of‐line (BEOL) integrated circuit interconnection stack, without any additional substrate etching steps, is presented. The mechanical device composed of a CMOS‐process 8 μm‐thick metal‐via‐metal stack of 135 μm diameter and suspended 2.5 μm over a bottom fixed electrode, has a resonance frequency of 20 kHz, a sensing capacitance of 50 fF with sensitivity 14 aF/G and it is integrated on the same substrate with a simple low‐noise amplifier reaching 25 mG of RMS noise measured from 0.25 to 100 Hz bandwidth.

This article presents a mixed-signal closed-loop control system for Lorentz force resonant MEMS magnetometers. The control system contributes to 1) the automatic phase control of the loop, that allows start-up and keeps self-sustained oscillation at the MEMS resonance frequency, and 2) output offset reduction due to electrostatic driving by selectively disabling it. The proposed solution proof-of-concept has been tested with a Lorentz force based MEMS magnetometer. The readout electronic circuitry has been implemented on a printed circuit board with off-the-shelf components. Digital control has been implemented in an FPGA coded with VHDL. When biased with 1 V and a driving current of 300 μArms, the device shows 9:75 pA=μT sensitivity and total sensor white noise of 550 nT= p√Hz. Offset when electrostatic driving is disabled is 793 μT, which means a 40:1electrostatic driving is enabled. Moreover, removing electrostatic driving does not worsen bias instability, which is lower than 125 nT in both driving cases.

In this paper we present to the best of our knowledge a first ever reported CMOS BEOL-embedded lateral acceleration sensor obtained by simple isotropic inter-metal dielectric etching without any additional substrate etching steps. The device leverages the availability of thick metal and via layers of a 0.25 μm RF CMOS technology, featuring 7.36 kHz resonance frequency and differential capacitive sensitivity 0.2 fF/G. The accelerometer is monolithically integrated with on-chip sensing electronics exhibiting 200 μG/√Hz total noise floor at 2.5 V power supply and 550 μA current consumption.

This article describes a low-noise readout amplifier for a post-CMOS BEOL (Back End Of Line) surface micromachining capacitive accelerometer. Simulations show 300.0 zF/√Hz acceleration and 4.2 zF/√Hz capacitance noise floors while chopping at 1 MHz and having a power consumption of 1.38 mW. The performed noise minimization is described, comprising input transistor pair type election, optimum input pair inversion region and dimensions using an all-region EKV model and equations describing parasitics and loop characteristics of the circuit. Simulations have been included that verify the theoretical model accuracy and demonstrate final circuit noise performance. The circuit layout has been taped out and testchip availability is expected soon for experimental measurements.

This work introduces multi-sensor integration combined with an efficient and adaptive Spiking Neural Network (SNN) emulation architecture for local intelligent processing. For this purpose, we propose CMOS-MEMS with on-chip conditioning electronics together with spike processing by means of a real-time bioinspired and model-programmable SIMD multiprocessor. System integration considerations and results in the MEMS and processor developments are provided.