A super class-AB version of the recycling folded cascode (RFC) operational transconductance amplifier (OTA) is proposed. The use of an adaptive bias circuit for the input differential pair provides dynamic current boosting and increased gain-bandwidth product (GBW). Moreover, use of local common-mode feedback (LCMFB) at the load of the differential pair further improves these performance parameters and provides high current efficiency. Measurement results of a test chip prototype fabricated in a 0.5-μm CMOS process show an increase in slew rate and GBW by a factor of 34 and 3, respectively, versus the conventional RFC OTA using the same supply voltage and bias currents. Overhead in other performance metrics is small.

An enhanced single-stage folded cascode operational transconductance amplifier able to drive large capacitive loads is presented. Circuits that adaptively bias the input differential pair and the current folding stage are employed, which provide class AB operation with dynamic current boosting and increased gain-bandwidth (GBW) product. Measurement results of a test chip prototype fabricated in a 0.5-μm CMOS process show an increase in slew rate and GBW by a factor of 30 and 15, respectively, versus the class A version using the same supply voltage and bias currents. Overhead in other performance metrics is small.

An enhanced super class AB recycling folded cascode operational transconductance amplifier is presented. It combines various adaptive biasing and transconductance enhancement techniques. Measurement results of a CMOS 130 nm test chip prototype show an improvement in slew rate and gain-bandwidth product by factors 100 and 27, respectively, compared to the conventional recycling folded cascode topology for the same supply voltage and bias currents.

A micropower telescopic cascode opamp is described. It employs an adaptive bias current source to obtain class‐AB operation and dynamic biasing of the cascode transistors to improve output swing and common‐mode rejection ratio (CMRR), and to avoid slew rate degradation. Measurement results for a 0.5 μm CMOS test chip prototype validate the proposal.

A class AB one‐stage fully differential amplifier is described. It includes adaptive biasing techniques to the conventional class A differential amplifier that improve linearity, gain‐bandwidth product and slew rate, maintaining the same DC bias currents and supply voltage requirements. Boosting of dynamic currents for large input signals takes place at the output branches, without internal replication of these currents. This leads to a nearly 100% current efficiency. Measurement results for a 0.5 μm CMOS test chip prototype validate the proposal.