A super class-AB version of the recycling folded cascode (RFC) operational transconductance amplifier (OTA) is proposed. The use of an adaptive bias circuit for the input differential pair provides dynamic current boosting and increased gain-bandwidth product (GBW). Moreover, use of local common-mode feedback (LCMFB) at the load of the differential pair further improves these performance parameters and provides high current efficiency. Measurement results of a test chip prototype fabricated in a 0.5-μm CMOS process show an increase in slew rate and GBW by a factor of 34 and 3, respectively, versus the conventional RFC OTA using the same supply voltage and bias currents. Overhead in other performance metrics is small.

An enhanced single-stage folded cascode operational transconductance amplifier able to drive large capacitive loads is presented. Circuits that adaptively bias the input differential pair and the current folding stage are employed, which provide class AB operation with dynamic current boosting and increased gain-bandwidth (GBW) product. Measurement results of a test chip prototype fabricated in a 0.5-μm CMOS process show an increase in slew rate and GBW by a factor of 30 and 15, respectively, versus the class A version using the same supply voltage and bias currents. Overhead in other performance metrics is small.

In this paper, a highly power-efficient class-AB-AB Miller op-amp is discussed. The structure uses gm enhancement based on local common-mode feedback to provide class-AB operation with enhanced effective gm, open-loop gain, unity-gain frequency, and slew rate (SR) without significant increase in quiescent power consumption. Utilization of a nonlinear load leads to large symmetric positive and negative SRs. Stability over an extremely wide range of capacitive loads is achieved through a combination of Miller and phase-lead compensations. The unity-gain frequency does not show sensitivity to capacitive load values. A test chip prototype fabricated in 0.18-μm CMOS technology shows 90.8-dB open-loop gain, 12.5-MHz bandwidth for a 25-pF load capacitance, and a factor 60 SR enhancement with maximum output current close to 1-mA and 43-μA total static current.

An enhanced super class AB recycling folded cascode operational transconductance amplifier is presented. It combines various adaptive biasing and transconductance enhancement techniques. Measurement results of a CMOS 130 nm test chip prototype show an improvement in slew rate and gain-bandwidth product by factors 100 and 27, respectively, compared to the conventional recycling folded cascode topology for the same supply voltage and bias currents.

A new approach to design super class AB operational transconductance amplifiers (OTAs) with enhanced large-signal and small-signal performance is presented. It is based on employing two nested positive and negative feedback loops at the active load of an adaptively biased differential pair in weak inversion region. As a result, DC gain, gain-bandwidth product, settling time and noise are improved compared to conventional super class AB OTAs without extra circuit nodes or power consumption. Measurement results of a 180 nm CMOS test chip prototype show a current boosting factor higher than 5000 and a nearly ideal current efficiency. Due to the ultra-low quiescent currents and high driving capability, the circuit exhibits an excellent large-signal figure-of-merit (FOM _L ) of 236 V ^-1 . To illustrate the applicability of the proposed approach, a differential sample-and-hold (S/H) circuit was designed and fabricated on the same test chip. Measurement results of the S/H validate the advantages of the proposal.

A simple technique to implement highly power efficient class AB-AB Miller op-amps is presented in this paper. It uses a composite input stage with resistive local common mode feedback that provides class AB operation to the input stage and essentially enhances the op-amp's effective transconductance gain, the dc open-loop gain, the gain-bandwidth product, and slew rate with just moderate increase in power dissipation. The experimental results of op-amps in strong inversion and subthreshold fabricated in a 130-nm standard CMOS technology validate the proposed approach. The op-amp has 9 V · pF/μs· μW large-signal figure of merit (FOM) and 17 MHz· pF/μW small-signal FOM with 1.2-V supply voltage. In subthreshold, the op-amp has 10 V· pF/μs· μW large-signal FOM and 92 MHz· pF/μW small-signal FOM with 0.5-V supply voltage.