Stylianos Siskos

Prof. Stylianos Siskos

Electronics Laboratory, Department of Physics, Aristotle University of Thessaloniki, 541 24 Thessaloniki, Greece

Research Focus & Metrics

Academic Career Length

34Years (1993-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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7 March 2022 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
IMIoannis Mandourarakis
Ioannis Mandourarakis
VGVasiliki Gogolou
Vasiliki Gogolou
EKEftichios Koutroulis
Eftichios Koutroulis
Stylianos SiskosStylianos Siskos
Stylianos Siskos
The integrated circuits employed for power management in photovoltaic (PV) energy harvesting applications are required to perform an efficient maximum power point tracking (MPPT) process for maximizing the power production of the PV source during the continuously changing atmospheric conditions. Among the alternative MPPT methods, the perturbation and observation (P&O) technique has the advantages of operational and implementation simplicity. In this article, a novel PV MPPT control system for on-chip implementation of the P&O MPPT method is presented, which, compared to the past-proposed on-chip MPPT systems, has the advantage that it is implemented based on purely digital CMOS circuits without requiring the use of complex circuits, such as multipliers, sample and hold units, or analog-to-digital converters. Therefore, it can be easily implemented on-chip with low design complexity while simultaneously retaining the high-performance features of the P&O MPPT technique. The proposed PV MPPT system has been fabricated using the XFAB XH018 0.18- μ m CMOS technology. The experimental results verify the successful operation of the on-chip PV MPPT control unit and its ability to achieve a high MPPT efficiency over a wide range of operating solar irradiation values.

1 June 1993 in IEEE Transactions on Instrumentation and Measurement
Verified
Journal Article
Closed access
AHA.A. Hatzopoulos
A.A. Hatzopoulos
Stylianos SiskosStylianos Siskos
Stylianos Siskos
JKJ.M. Kontoleon
J.M. Kontoleon

1 April 2011
Verified
Conference Paper
Closed access
VKV. Kalenteridis
V. Kalenteridis
Spyridon VlassisSpyridon Vlassis
Spyridon Vlassis
Stylianos SiskosStylianos Siskos
Stylianos Siskos
This paper proposes a simple CMOS exponential current circuit that is capable to control a Variable Gain Amplifier with a linear-in-dB manner. The proposed implementation is based on a Taylor's series approximation of the exponential function. A simple VGA architecture has been designed in a CMOS 90nm technology, in order to validate the theoretical analysis. The approximation achieves a 17dB linear range with less than 0.5dB approximation error, while the overall power consumption is less than 300μW.

5 February 2012 in Analog Integrated Circuits and Signal Processing
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Journal Article
Closed access
PDF file
VKVassileios Kalenteridis
Vassileios Kalenteridis
Spyridon VlassisSpyridon Vlassis
Spyridon Vlassis
Stylianos SiskosStylianos Siskos
Stylianos Siskos

1 November 2022 in Sensors
Verified
Journal Article
Open access
PDF file
ZAZoi Agorastou
Zoi Agorastou
Thomas NoulisThomas Noulis
Thomas Noulis
Stylianos SiskosStylianos Siskos
Stylianos Siskos
An overview of the electric field mill sensor specifications in applications related to the measurement of the atmospheric electric field was conducted. The different design approaches of the field mill sensor interface are presented and analyzed, while the sensitivity-related parameters of a field mill are discussed. The design of a non-complex analog sensor interface that can be employed for the measurement of the electric field in both fair and foul weather conditions, such as thunderstorms, is implemented using discrete components for experimental validation and is optimized in an integrated version in terms of noise and power consumption. Advanced noise simulations are conducted in a 180 nm CMOS process (XH018 XFAB). The energy-autonomous operation of the sensor for extended periods of time is made feasible due to the low power consumption of the front-end circuitry (165 μW at 3 V) as well as the proposed intermittent style of operation of the motor. The total sensing system is low power, and its realization is simple and cost-effective, while also offering adequate sensitivity (45 mV/kV/m), making it comparable to the existing works.

5 July 2021
Verified
Conference Paper
Closed access
Nick RigogiannisNick Rigogiannis
Nick Rigogiannis
ABAlexandros Boubaris
Alexandros Boubaris
ZAZoi Agorastou
Zoi Agorastou
Nick PapanikolaouNick Papanikolaou
Nick Papanikolaou
Stylianos SiskosStylianos Siskos
Stylianos Siskos
EKEftichios Koutroulis
Eftichios Koutroulis
This paper focuses on the design of a low-voltage power converter for an on-chip PV cell-level inverter. Various topologies are discussed for the DC/DC stage, whereas the ZVS quasi-resonant boost and the synchronous boost are considered the most appropriate for this application. Both the aforementioned topologies are modeled and evaluated in terms of efficiency, by the aid of PSpice simulations. Due to requirements and limitations of the available 0.18 μm CMOS process technology, the synchronous boost is finally chosen as the most appropriate solution. As for the DC/AC stage, the H-bridge inverter configuration is selected, as a simple, compact and cost-effective solution. A prototype converter is designed and constructed with discrete components, so as to validate the functionality and performance of the proposed system. Finally, experimental results are presented, indicating the high efficiency that can be achieved.