Ga₂O₃ has gained intensive attention for the continuing myth of the electronics as a new-generation wide bandgap semiconductor, owing to its natural physical and chemical properties. In this review article, we selectively summarized the recent advances on the experimental and theoretical demonstration of β-Ga₂O₃-based power devices, including Schottky barrier diodes and field-effect transistors, aiming for an inherent comprehending of the operating mechanisms, discussion on the obstacles to be addressed, and providing some comprehensive guidance for further developments. In the short run, Ga₂O₃ may well be promising to lead power electronics.

The application of organic field-effect transistors (OFETs) in the power device realm has not been explored yet. To achieve a high breakdown voltage, a novel lateral drift region OFET(LDR-OFET) is proposed in this letter. By employing the diketopyrrolopyrrole-based polymer(DPPT-TT) and Poly (methyl methacrylate) (PMMA) to form semiconductor and insulator layers respectively, the fabricated LDR-OFET, despite the simple process and low cost, exhibits an excellent off-state breakdown capability while maintaining a considerable on-state performance. With a $20~\mu \text{m}$ length of the drift region, the LDR-OFET realizes 2200V breakdown voltage on a spin-coated 50nm thick semiconductor layer. The average electric field of the proposed device reaches 1.18MV/cm before an avalanche-like breakdown occurs. The physical nature of the breakdown mechanism is explored using the 1-D PIN equivalent structure and avalanche breakdown theory. The correctness and effectiveness of the proposed LDR-OFET and breakdown analysis are well demonstrated and validated by experimental results. The LDR-OFETs are expected to fill the blank of organic power devices and be the core component of future organic power integrated circuits.

The silicon-on-insulator (SOI) lateral double-diffused metal–oxide–semiconductor (LDMOS) with high- $\textit{k}$ multi-fingers (HKMFs) is proposed and investigated. The fingertips are distributed at specific locations to modulate the electric field distributions and improve the device performances. First, the electric field peaks formed at the fingertips could optimize the electric field distributions, which improves the breakdown voltage (BV) of the LDMOS effectively. Meanwhile, the multi-fingers are embedded into the drift region to increase the optimal drift doping concentration, which facilitates the positive conduction of the device and reduces the specific ON-resistance ( $\textit{R}_{\text{on,\text{sp}}}\text{)}$ . The simulation results show that the proposed HKMF-LDMOS with five multi-fingers increases the BV by 59.2%, reduces $\textit{R}_{\text{on,\text{sp}}}$ by 37.8%, and improves the figure of merit (FOM) by 4.07 times when compared to the conventional LDMOS.

This article presents a novel lateral double-diffused metal oxide semiconductor (LDMOS) with integrated triple direction high- ${k}$ gate and field dielectrics (HKGF LDMOS). The main feature of the novel HKGF LDMOS is that the top silicon layer is etched to several pillars, and each pillar is surrounded by the high- ${k}$ dielectric from top and two sides. First, the triple direction high- ${k}$ dielectric surrounding the channel forms the high- ${k}$ metal gate structure together with the triple direction metal gate, which decreases the specific ON-resistance ( ${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$ ) and threshold voltage ( ${V}_{TH}$ ) due to the increasing gate dielectric capacitance. Meanwhile, the triple direction gate structure broadens the channel width without enlarging device size, thus increasing the transconductance ( ${g}_{m}$ ) and further decreasing the ${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$ . Second, the triple direction high- ${k}$ dielectric surrounding the drift region has strong modulation effect on the electric field and assistant depletion effect on the drift region, leading to the increasing of the breakdown voltage (BV) and decreasing of the ${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$ . The simulation results indicate that when comparing with the conventional LDMOS, the proposed HKGF LDMOS not only decreases the ${V}_{TH}$ by 72.7% and ${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$ by 48.1%, but also increases the ${g}_{m}$ and BV by 188.2% and 157.6%, respectively.

This paper proposes and investigates a novel 4H‐SiC trench MOSFET (TMOS) with integrated high‐ K deep trench and gate dielectric (INHK‐TMOS). The integrated high‐ K (INHK) consists of a high‐ K gate dielectric and an extended high‐ K deep trench dielectric in the drift region. Firstly, the high‐ K gate dielectric together with the metal‐forming high‐ K metal gate structure, which increases the gate oxide capacitance ( C _OX ), reduces the threshold voltage ( V _TH ) and the specific on‐resistance ( R _on,sp ). Secondly, the extended high‐ K deep trench dielectric not only modulates the electric field in the drift region by introducing a new electric field peak at the bottom of the high‐ K deep trench dielectric, thereby enhancing the breakdown voltage ( BV ), but also improves the doping concentration ( N _D ) of the drift region by the assist depletion effect of the high‐ K dielectric, further optimizing the forward conduction characteristics. Simulation results demonstrate that when compared to the conventional TMOS, the INHK‐TMOS using HfO ₂ exhibits a 52.6% reduction in V _TH , a 52.1% reduction in R _on,sp , a 20.3% increasement in BV and a 202.3% improvement in figure of merit.

In this work, we fabricated high-voltage (HV) amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) consisting of an ultra-thin buried layer of amorphous InZnO (a-IZO) and a drain offset region. With a drain offset length ( L _offset ) of 2 μm, a breakdown voltage ( V _BD ) of 457 V is achieved. The output current is four times higher than the conventional device, thanks to the a-IZO buried layer. TCAD simulation is performed to reveal the operating mechanism of the fabricated device. A sub-channel is formed at the a-IZO/a-IGZO interface to improve the current capability of the HV device, achieving an excellent specific on-resistance ( R _{on, sp} ) of 6.25×10 ³ mΩ∙cm ² and a Baliga’s Figure of Merit (BFOM) of 33.4 KW/cm ² .