In this study, we developed a series of second-order gradient overlap-coupling octagonal superconducting quantum interference device (SQUID) current sensors for transition edge sensor (TES) applications. According to the requirements of TESs, we designed various parameters of SQUID current sensors, including different Josephson junction (JJ) sizes, different hysteresis and screening parameters, input coils with different inductances. The superconducting loop, input coil, and feedback coil of the SQUID current sensors adopt a second-order gradient structure, which can effectively enhance their anti-interference electromagnetic capability. Further, all the coupling structures between the superconducting loop and input/feedback coil adopt overlap-coupling octagonal structures, which can effectively enhance the coefficient of coupling mutual inductance. A series of second-order gradient SQUID current sensors overlap-coupled with input coils of 1.5, 2.5, and 5.5 turns based on Nb/Al–AlO _x /Nb JJs were successfully fabricated on 2 inch silicon wafers by optimising the fabrication processes. From the simulation results, a minimal magnetic coupling factor of 0.02 between the feedback coil and input coil is obtained in the overlapped structure of the SQUID current sensor with an input coil of 1.5 turns; thus the magnetic interference between the feedback coil and input coil in this design is negligible. According to the measurement results at liquid–helium temperatures, SQUID current sensors with second-order gradient overlap-coupling octagonal structures have an excellent capability to weaken environmental electromagnetic interference. The SQUID current sensor with an input coil of 5.5 turns has the smallest current sensitivity, 2.4 μA/Φ₀ and lowest current noise, 1 pA (√Hz)⁻¹ compared with those of other input coils of different turns. The SQUID current sensor with an input coil of 2.5 turns has the lowest flux noise, 0.3 μΦ₀ (√Hz)⁻¹, and the lowest coupled noise energy, 11 h, among all the three different input coils, which are balanced results between the input inductance and the device noise. SQUID current sensors with second-order gradient overlap-coupling octagonal structures show low flux noise, low current noise, and low coupled noise energy, which can be compared with the state-of-art SQUID current sensor worldwide, and can satisfy the requirements of TES applications.

SiO₂ is one of the most widely used dielectric materials in optical and electronic devices. The Josephson voltage standard (JVS) chip fabrication process has rigorous requirements for the deposition temperature and step-coverage profiles of the SiO₂ insulation layer. In this study, we deposited high-quality SiO₂ insulation films at 60 °C using inductively coupled plasma-chemical vapor deposition (ICP-CVD) to fulfill these requirements and fabricate JVS chips simultaneously. SiO₂ films have a high density, low compressive stress, and a sloped sidewall profile over the vertical junction steps. The sidewall profiles over the vertical junction steps can be adjusted by changing the radio frequency (RF) power, ICP power, and chamber pressure. The effects of sputtering etch and sloped step coverage were enhanced when the RF power was increased. The anisotropy ratio of the deposition rate between the sidewall and the bottom of the film was lower, and the sloped step coverage effect was enhanced when the ICP power was increased, or the deposition pressure was decreased. The effects of the RF power on the stress, density, roughness, and breakdown voltage of the SiO₂ films were also investigated. Despite increased compressive stress with increasing RF power, the film stress was still low and within acceptable limits in the device. The films deposited under optimized conditions exhibited improved densities in the Fourier transform infrared spectra, buffered oxide etch rate, and breakdown voltage measurements compared with the films deposited without RF power. The roughness of the film also decreased. The step-coverage profile of the insulation layer prepared under optimized conditions was enhanced in the junction and bottom electrode regions; additionally, the performance of the device was optimized. This study holds immense significance for increasing the number of junctions in future devices.

As Nb films are widely used as superconducting electrodes of Josephson junctions, it is important to investigate the properties of Nb films in order to fabricate high-quality Josephson junctions. In this work, we conducted a comprehensive analysis of the relationships among the properties of DC magnetron sputtered Nb films with a constant power fabricated at the National Institute of Metrology (China). The film properties, including superconductivity, stress, lattice constant, and surface roughness, were investigated. It was found that in the case of constant power and Ar pressure, the stress and other parameters of the Nb films can maintain a relatively stable state during the continuous consumption of the target material.

The Nb/Al-AlO _x /Nb (SIS) Josephson junction is a crucial component in many types of superconducting devices. However, it can be easily damaged during the plasma fabrication processes. Anodic oxidation is an effective method for protecting SIS junctions by oxidizing Nb and Al from the junction profile. We used a custom wafer-scale anodic oxidation system and a neutral electrolyte to study the oxidation process of Nb films and Nb-Al(-AlO _x )-Nb junctions. The oxidation process was thoroughly characterized by considering factors such as morphology and electrical properties. Anodization spectroscopy revealed varying oxidation sections from the top Nb layer to the bottom layer, extending across the Al-AlO _x interlayer. This indicates that a 4 nm Al layer is sufficient to cover the surface of the bottom Nb film. High-resolution transmission electron microscopy and energy dispersive spectroscopy revealed that the Nb₂O₅ layer produced from the oxidation of the bottom Nb layer penetrated the Al₂O₃ layer and migrated to the top surface as the oxidation voltage increased. The top Nb layer of the SIS junction was also subjected to oxidation, despite the presence of a protective photoresist. Following the anodic oxidation process, the entire wafer surface was coated with an insulating Nb₂O₅ film. This film provided protection for the SIS junctions during the subsequent microfabrication process. The fabricated junction array, consisting of 128 junctions, demonstrated uniform electrical properties benefiting from the anodic oxidation process. This systematic analysis will further the research and practical applications of SIS junctions.

Probing the relaxation dynamics of glasses at temperatures far below the glass transition remains challenging owing to the extremely slow relaxation characteristic and the lack of appropriate experimental techniques. We utilized a sensitive laser reflection curvature method to probe the slow relaxation dynamics of metallic glassy (MG) films of different thicknesses at room temperature. It was found that the relaxation dynamics of MG films can be dramatically accelerated by the thickness reduction, similar to the role of temperature. We also compared the size-induced relaxation of MG films to the relaxation of MG ribbons at varying temperatures. Similar effects of size and temperature on the relaxation dynamics are revealed. We show that a MG film with a thickness of $\sim 10$ nm at room temperature has a fast relaxation dynamics equivalent to that of a bulk MG near the glass transition temperature within an observation time scale of 1 s, indicating that the liquidlike behavior in glass can be induced by size reduction. Our observation for MGs, similar to that of polymer glasses reported previously, suggests that the size-induced enhanced relaxation dynamics and glass transition is universal in glassy materials.

This work proposes a balanced segmentation scheme to improve microwave transmission and develops a 2 V programmable Josephson junction array using double-stacked superconductor-normal-metal-superconductor Josephson junctions. The junction numbers of the sub-Josephson arrays are divided into a ternary sequence. The least significant bit is one stack or two junctions. In order to characterize the chip with many sub-arrays, an automatic measurement system with self-made multi-channel current sources was established. It can analyze the critical current, the margin of the voltage steps, and the number of junctions in each sub-array. The measurement found that the mentioned junction arrays can work at several microwave frequency ranges with an operating margin higher than 1.5 mA. Moreover, the circuit can produce intrinsically stable DC voltages from –2 V to +2 V and generate stepwise-approximated AC voltages.