In this paper, an event-driven wireless sensor node is proposed and demonstrated. The primary design objective is to devise a wireless sensor node with miniaturization, integration, and high-accuracy recognition ability. The proposed wireless sensor node integrates two vibration-threshold-triggered energy harvesters that sense and power a threshold voltage control circuit for power management, a microcontroller unit (MCU) for system control, a one-dimensional convolutional neural network (1D-CNN) environment data analysis and vibration events distribution, and a radio frequency (RF) digital baseband transmitter with IEEE 802.15.4-/.6 protocols. The dimensions of the wireless sensor node are 4 × 2 × 1 cm3. Finally, the proposed wireless sensor node was fabricated and tested. The alarming time for detecting the vibration event is less than 6 s. The measured recognition accuracy of three events (knock, shake, and heat) is over 97.5%. The experimental results showed that the proposed integrated wireless sensor node is very suitable for wireless environmental monitoring systems.
This paper proposes a piezoresistive high-temperature absolute pressure sensor based on (100)/(111) hybrid SOI (silicon-on-insulator) silicon wafers, where the active layer is (100) silicon and the handle layer is (111) silicon. The 1.5 MPa ranged sensor chips are designed with the size as tiny as 0.5 × 0.5 mm, and the chips are fabricated only from the front side of the wafer for simple, high-yield and low-cost batch production. Herein, the (100) active layer is specifically used to form high-performance piezoresistors for high-temperature pressure sensing, while the (111) handle layer is used to single-side construct the pressure-sensing diaphragm and the pressure-reference cavity beneath the diaphragm. Benefitting from front-sided shallow dry etching and self-stop lateral wet etching inside the (111)-silicon substrate, the thickness of the pressure-sensing diaphragm is uniform and controllable, and the pressure-reference cavity is embedded into the handle layer of (111) silicon. Without the conventionally used double-sided etching, wafer bonding and cavity-SOI manufacturing, a very small sensor chip size of 0.5 × 0.5 mm is achieved. The measured performance of the 1.5 MPa ranged pressure sensor exhibits a full-scale output of approximately 59.55 mV/1500 kPa/3.3 VDC in room temperature and a high overall accuracy (combined with hysteresis, non-linearity and repeatability) of 0.17%FS within the temperature range of −55 °C to 350 °C. In addition, the thermal hysteresis is also evaluated as approximately 0.15%FS at 350 °C. The tiny-sized high temperature pressure sensors are promising in various industrial automatic control applications and wind tunnel testing systems.
A silicon-chip based double-deck three-dimensional (3D) solenoidal electromagnetic (EM) kinetic energy harvester is developed to convert low-frequency (<100 Hz) vibrational energy into electricity with high efficiency. With wafer-level micro electro mechanical systems (MEMS) fabrication to form a metal casting mold and the following casting technique to rapidly (within minutes) fill molten ZnAl alloy into the pre-micromachined silicon mold, the 300-turn solenoid coils (150 turns for either inner solenoid or outer solenoid) are fabricated in silicon wafers for saw dicing into chips. A cylindrical permanent magnet is inserted into a pre-etched channel for sliding upon external vibration, which is surrounded by the solenoids. The size of the harvester chip is as small as 10.58 mm × 2.06 mm × 2.55 mm. The internal resistance of the solenoids is about 17.9 Ω. The maximum peak-to-peak voltage and average power output are measured as 120.4 mV and 43.7 . The EM energy harvester shows great improvement in power density, which is 786 and the normalized power density is 98.3 . The EM energy harvester is verified by experiment to be able to generate electricity through various human body movements of walking, running and jumping. The wafer-level fabricated chip-style solenoidal EM harvesters are advantageous in uniform performance, small size and volume applications.
The paper reports on high voltage (HV)-isolated MEMS quad–solenoid transformers for compact isolated gate drivers and bias power supplies. The component is wafer-level fabricated via a novel MEMS micro-casting technique, where the tightly coupled quad–solenoid chip consists of monolithically integrated 3D inductive coils and an inserted ferrite magnetic core for high-efficiency isolated power transmission through electromagnetic coupling. The proposed HV-isolated transformer demonstrates a high inductance value of 743.2 nH, along with a small DC resistance of only 0.39 Ω in a compact footprint of 6 mm2, making it achieve a very high inductance integration density (123.9 nH/mm2) and the ratio of L/R (1906 nH/Ω). More importantly, with embedded ultra-thick serpentine-shaped (S-shaped) SiO2 isolation barriers that completely separate the primary and secondary windings, an over 2 kV breakdown voltage is obtained. In addition, the HV-isolated transformer chips exhibit a superior power transfer efficiency of over 80% and ultra-high dual-phase saturation current of 1.4 A, thereby covering most practical cases in isolated, integrated bias power supplies such as high-efficiency high-voltage-isolated gate driver solutions.
1 April 2024 in IEEE Transactions on Electron Devices
In order to realize high performance and miniaturized integrated voltage regulators (IVRs), the study of ON-chip passive components, especially coupled inductors is necessary. Silicon-embedded coupled three-dimensional solenoidal inductors with 10-turn and 15-turn interleaved windings are designed and batch fabricated in series using micro-electro-mechanical systems (MEMS) and a novel Zn-Al alloy micro-casting technique (MCT) process. The coupled inductors developed in this study incorporating an embedded $200~\mu \text{m}$ -thick ferrite magnetic core, exhibit superior inductance integration densities of 56.7 nH/mm2, and ultrahigh coupling coefficients over 0.96 at lower frequencies of around 10 MHz. Besides, the maximum efficiencies of both 10-turn and 15-turn coupled inductors reach 93.23% and 91%, respectively. These results demonstrate significant performance improvements over the corresponding air-core coupled inductors. In addition, both designs exhibit high current carrying capacity with a measured saturation current over 2.2 A when operating in an inversely coupled mode. The superior performance of proposed coupled inductors is beneficial to the design and application of IVRs.
23 December 2022 in IEEE Transactions on Power Electronics
Reported are a novel kind of tight-coupled dual-solenoid transformers (DSTs) which are on-chip integrated by using wafer-level fabrication including a low melting-point zinc-aluminum alloy rapid microcasting technique. Without magnetic core used, the silicon-chip integrated transformer is with the two metal solenoids tightly interwound to form a highly-coupled 3-D structure, thereby performing high inductance density and featuring no concern in magnetic flux saturation. Fabricated with the wafer-level thick-metal 3-D microcasting technique, the DST exhibits sufficient inductance value and low dc resistance while maintaining tiny footprint. Various DST structures are designed, fabricated and characterized for performance optimization. The optimally designed DST chip demonstrates a compact footprint of 2 mm 2 , a high inductance of 193.14 nH (i.e., inductance density = 96.57 nH/mm 2 ) and a small dc resistance of 1.09 Ω. The test shows that the chip achieves an ultrahigh coupling coefficient of 0.95 and superior maximum transformer efficiency of 87.8% at 100 MHz. More importantly, the DST achieves Watt -scale power transfer capability at 100 MHz, where no any heat dissipation treatment to the chip is used. Therefore, the on-chip DSTs are very promising for power/signal transmission in various electronic microsystems.