In this letter, we demonstrate a high-threshold-voltage and high-current-density normally-off SiN/AlN/ GaN-on-Si MIS-HEMT with in situ low-damage H ₂ /N ₂ plasma pretreatment. The in situ plasma pretreatment was performed in a plasma enhanced atomic layer deposition (PEALD) system prior to the PEALD-AlN deposition, which effectively suppress the interface trap densities between the AlN/GaN interface and increase the mobility of electrons to 198.80 cm $^{{2}}/\text {V} \cdot \text {s}$ . Therefore, the devices demonstrate state-of-art characteristics with a competitive maximum drain current of 683.75 mA/mm at ${V} _{\textit {GS}} =15\text{V}$ and a high threshold of 6.28 V. The devices also show ON/OFF current ratio of $10^{{8}}$ and off-state breakdown voltage of 1778 V.

In this letter, we demonstrate a GaN-based E/D-mode (Enhancement/Depletion-mode) inverter with PEALD-AlN (Plasma Enhanced Atomic Layer Deposition) and LPCVD-SiN (Low Pressure Chemical Vapor Deposition) as bilayer gate dielectric, where the E-mode GaN-MISHEMT is fabricated based on our proposed self-terminating gate recess etching technique. The combination of the two dielectrics makes the device exhibits high gate swing and low dielectric/III-V interface state densities. So that the fabricated inverter shows a large logic swing, high temperature stability and low hysteresis effect.

A novel effective reliability improvement technology for gallium nitride (GaN) devices and passivation dielectric stack consisting of a plasma-enhanced atomic layer deposition (PEALD) grown aluminum nitride (AlN, 5 nm) and a low-pressure chemical vapor deposition (LPCVD) grown silicon nitride (SiN $_{\textit{x}}$ , 30 nm) in normally-OFF GaN metal–insulator–semiconductor field-effect transistors (MIS-FETs) is proposed. This reliability improvement technique features an in situ H $_{\text{2}}$ (15%)/N $_{\text{2}}$ (85%) plasma pretreatment in a PEALD system before the deposition of PEALD AlN. The quality of the AlN/(Al)GaN interface, threshold voltage instability, and dynamic $\textit{R}_{\text{on}}$ in the normally-OFF GaN MIS-FETs with and without the in situ H $_{\text{2}}$ (15%)/N $_{\text{2}}$ (85%) plasma pretreatment was investigated using various methods. The equivalent parallel conductance method, high-frequency capacitance-voltage, time-of-fly (TOF) stress/measures, and quasi-static $\textit{I}_{\text{D}}$ – $\textit{V}_{\text{D}}$ methods were used in the experimental studies. The results showed that the in situ H $_{\text{2}}$ (15%)/N $_{\text{2}}$ (85%) plasma pretreatment technique is effective in improving the quality of the AlN/GaN interface. The devices with the in situ H $_{\text{2}}$ (15%)/N $_{\text{2}}$ (85%) plasma pretreatment had improved $\textit{V}_{\text{th}}$ stability and lower $\textit{R}_{\text{on, \textit{dyna}\textit{mic}}}$ / $\textit{R}_{\text{on, \textit{stat}\textit{ic}}}$ ratio, which was due to the reduced interface trap densities between the AlN/GaN interface and the improved mobility of 2-D electron gas (2DEG). The time-dependent dielectric breakdown (TDDB) and Weibull performance further verified that the proposed in situ H $_{\text{2}}$ (15%)/N $_{\text{2}}$ (85%) plasma pretreatment techniques were reliable in improving the reliability of GaN power devices.

An effective in situ H₂/N₂ pretreatment technique for enhancement-mode GaN MISFET with a PEALD AlN/LPCVD SiN_x Dual Gate Dielectric is presented. This technique features in situ H₂ (15%)/N₂ (85%) plasma pretreatment prior to AlN deposition. By using in situ H₂ (15%)/N₂ (85%) plasma pretreatment and a PEALD AlN protection layer, combined with an LPCVD SiN_x gate dielectric, the quality of the AlN/GaN interface can be further improved due to the reduced interface trap densities between the AlN/GaN interface. The interface protection technique enables the successful integration of a high-quality PEALD AlN/LPCVD SiN_x gate dielectric in an E-mode GaN MISFET with high performance, high stability, and high reliability. The fabricated enhancement-mode GaN MISFET exhibits a high gate swing and high channel effective mobility of 187.5 cm²/Vs, a threshold voltage of 2.9 V defined at 1 µA/mm, an on/off current ratio of 10⁸, and a breakdown voltage of 1760 V defined at I_D = 10 μm/mm. Our experiments showed a significant reduction in dynamic ON resistance and the suppression of current collapse when using the enhancement-mode GaN MISFET with PEALD AlN/LPCVD SiN_x under high drain bias switching conditions, especially when the V_DS is greater than the 60 V drain bias switch operating state.