Lithium-ion (Li-ion) batteries are a key energy storage component in various electrical and electronic systems, such as mobile phones and electric vehicles. A properly designed battery management system (BMS) is crucial to guarantee the safety, reliability, and optimal performance of the battery, as well as to interconnect the battery systems with each other and external systems through communication channels. However, security threats of the Li-ion battery systems are often overlooked by BMS developers in the design phase. The cybersecurity of BMSs is an essential factor to consider as more battery systems require internet connectivity for functionality, such as intelligent monitoring, control, and maintenance. This article discusses the overall security vulnerabilities from potential cyber-attacks and defense strategies, as well as the adoption of current blockchain technology in BMSs, which will be used as a cybersecurity baseline reference to BMS developers. The implementation of blockchain technology is promising to protect BMSs from malicious cyber-physical attacks and ensure the secure utilization of battery systems for numerous applications in cyber-physical environments.

This paper develops an ultra-low power asynchronous circuit design methodology, called Multi-Threshold NULL Convention Logic (MTNCL), also known as Sleep Convention Logic (SCL), which combines Multi-Threshold CMOS (MTCMOS) with NULL Convention Logic (NCL), to yield significant power reduction without any of the drawbacks of applying MTCMOS to synchronous circuits. In contrast to other power reduction techniques that usually result in large area overhead, MTNCL circuits are actually smaller than their original NCL versions. MTNCL utilizes high-V_t transistors to gate power and ground of a low-V_t logic block to provide for both fast switching and very low leakage power when idle. To demonstrate the advantages of MTNCL, a number of 32-bit IEEE single-precision floating-point co-processors were designed for comparison using the 1.2 V IBM 8RF-LM 130 nm CMOS process: original NCL, MTNCL with just combinational logic (C/L) slept, Bit-Wise MTNCL (BWMTNCL), MTNCL with C/L and completion logic slept, MTNCL with C/L, completion logic, and registers slept, MTNCL with Safe Sleep architecture, and synchronous MTCMOS. These designs are compared in terms of throughput, area, dynamic energy, and idle power, showing the tradeoffs between the various MTNCL architectures, and that the best MTNCL design is much better than the original NCL design in all aspects, and much better than the synchronous MTCMOS design in terms of area, energy per operation, and idle power, although the synchronous design can operate faster.

This paper describes a silicon carbide pulse width modulation (PWM) signal generator in the 1.2 μm HiT-SiC CMOS process developed by Raytheon Systems Ltd. The design features a 6-b binary input, which allows for setting a system's duty cycle. The results presented in this paper utilize a field programmable gate array board in the test setup to dynamically set the duty cycle by controlling each bit. A control current is also available to give the user added flexibility for tuning the duty cycle. Experimental results show the duty cycle range of the PWM generator to be between 4.7% and 95.2% at 400°C. Sustained operation of the circuit is demonstrated over a period of 50 h at 300°C. Finally, the PWM generator is evaluated in the operation of a boost converter.

This paper establishes the first integrated silicon carbide (SiC) CMOS linear voltage regulator. The design provides for a continuous load current exceeding 100 mA and a 15 V output from an input voltage of 20 to 30 V. The foundation of the regulator's feedback loop is formed by a two-stage SiC operational amplifier. Both internal and external passive components are used in the frequency compensation network. An external 7.5 V supply is connected to the operational amplifier and acts as the reference voltage. At 400°C, experimental results show a line regulation of better than 1.5 mV/V under a 100-mA load. The load regulation with a 30 V input and at 400°C is shown to be 0.42 mV/mA. Sustained operation of the linear regulator is demonstrated over 30 hours at 300°C.