The behavior of silicon carbide (SiC) power MOSFETs under stressful short-circuit (SC) conditions is investigated in this paper. Two different SC failure phenomena for SiC power MOSFETs are thoroughly reported. Experimental evidence and TCAD electrothermal simulations are exploited to describe and discriminate the failure sources. Physical causes are finally investigated and explained by means of properly calibrated numerical investigations and are reported along with their effects on devices' SC capability.

Failure mechanisms during short-circuit conditions of Silicon Carbide Power MOSFETs are analysed in this work, and a possible theoretical explanation is provided. Insight into the physics involved in such processes was inferred through experimental and numerical analyses. The TCAD structure used for electro-thermal simulations was calibrated to fit the I_D-V_GS characteristics of a commercial device. Adequate physical effects were considered, such as the presence of charges and traps at the oxide-SiC interface and their effect on threshold voltage and carrier mobility. Experimental evidences were explained by analyzing the numerical results. The high temperature reached during these operating conditions was addressed as the main cause of the device failure. The effect on the leakage current and the activation of a parasitic bipolar transistor are also shown.

This paper proposes a thorough experimental characterization of the performance of commercially available SiC Power MOSFETs under short-circuit conditions. The purpose is to assess and understand the degradation process and the failure mechanisms that limit device reliability to identify optimal routes for subsequent technology development. This paper complements electro-thermal functional tests with structural characterization offering deeper insight into device technology related aspects.

This paper investigates the failure mechanism of SiC power MOSFETs during avalanche breakdown under unclamped inductive switching (UIS) test regime. Switches deployed within motor drive applications could experience undesired avalanche breakdown events. Therefore, avalanche ruggedness is an important feature of power devices enabling snubber-less converter design and is also a desired feature in certain applications such as automotive. It is essential to thoroughly characterize SiC power MOSFETs for better understanding of their robustness and more importantly of their corresponding underling physical mechanisms responsible for failure in order to inform device design and technology evolution. Experimental results during UIS at failure and 2D TCAD simulation results are presented in this study.

This paper presents an in-depth investigation into the avalanche breakdown robustness of commercial state-of-the-art silicon carbide (SiC) power MOSFETs comprising of functional as well as structural characterization and the corresponding underlying physical mechanisms responsible for device failure. One aspect of robustness for power MOSFETs is determined by its ability to withstand energy during avalanche breakdown. Avalanche energy (E_AV) is an important figure of merit for all applications requiring load dumping and/or to benefit from snubber-less converter design. 2D TCAD electro-thermal simulations were performed to get important insight into the failure mechanism of SiC power MOSFETs during avalanche breakdown.