In this paper, we present an in-built N⁺ pocket electrically doped tunnel FET (ED-TFET) based on the polarity bias concept that enhances the DC and analog/RF performance. The proposed device begins with a MOSFET like structure (n-p-n) with a control gate (CG) and a polarity gate (PG). The PG is biased at −0.7 V to induce a P⁺ region at the source side, leaving an N⁺ pocket between the source and the channel. This technique yields an N⁺ pocket that is realized in the in-built architecture and removes the need for additional chemical doping. Calibrated 2-D simulations have demonstrated that the introduction of the N⁺ pocket yields a higher I_ON and a steeper average subthreshold swing when compared to conventional ED-TFET. Further, a local minimum on the conduction band edge (E_C) curve at the tunneling junction is observed, leading to a dramatic reduction in the tunneling width. As a result, the in-built N⁺ pocket ED-TFET significantly improves the DC and analog/RF figure-of-merits and, hence, can serve as a better candidate for low-power applications.

This paper proposes a low-cost test pattern generator for scan-based built-in self-test (BIST) schemes. Our method generates broadcast-based multiple single input change (BMSIC) vectors to fill more scan chains. The proposed algorithm, BMSIC-TPG, is based on our previous work multiple single-input change (MSIC)-TPG. The broadcast circuit expends MSIC vectors, so that the hardware overhead of the test pattern generation circuit is reduced. Simulation results with ISCAS’89 benchmarks and a comparison with the MSIC-TPG circuit show that the proposed BMSIC-TPG reduces the circuit hardware overhead about 50% with ensuring of low power consumption and high fault coverage.

Digital speckle correlation method is widely used in the areas of three-dimensional deformation and morphology measurement. It has the advantages of non-contact, high precision, and strong stability. However, it is very complex to be carried out with low speed software implementation. Here, an improved full pixel search algorithm based on the normalized cross correlation (NCC) method considering hardware implementation is proposed. According to the field programmable gate array (FPGA) simulation results, the speed of hardware design proposed in this paper is 2000 faster than that of software in single point matching, and 600 times faster than software in multi-point matching. The speed of the presented algorithm shows an increasing trend with the increase of the template size when performing multipoint matching.

An ultra-low-power and high-accuracy on-off bandgap reference (BGR) is demonstrated in this paper for implantable medical electronics. The proposed BGR shows an average current consumption of 78 nA under 2.8 V supply and an output voltage of 1.17 V with an untrimmed accuracy of 0.69%. The on-off bandgap combined with sample-and-hold switched-RC filter is developed to reduce power consumption and noise. The on-off mechanism allows a relatively higher current in the sample phase to alleviate the process variation of bipolar transistors. To compensate the error caused by operational amplifier offset, the correlated double sampling strategy is adopted in the BGR. The proposed BGR is implemented in 0.35 μm standard CMOS process and occupies a total area of 0.063 mm². Measurement results show that the circuit works properly in the supply voltage range of 1.8–3.2 V and achieves a line regulation of 0.59 mV/V. When the temperature varies from −20 to 80 °C, an average temperature coefficient of 19.6 ppm/°C is achieved.

The development of good-conductivity p-type β-Ga₂O₃ is crucial for the realization of its devices and applications. In this study, nitrogen-doped p-type β-Ga₂O₃ films with the characteristics of enhanced conductivity were fabricated through the thermal oxidation of GaN in a N₂O atmosphere. To obtain insights into the underlying mechanism of the thermally activated transformation process, additional measurements of the oxidized films were performed at temperatures of 1000, 1050, and 1100 °C. Room-temperature photoluminescence (PL) spectra showed a moderate ultraviolet emission peak at 246 nm, confirming the generation of gallium oxide with a band gap of approximately 5.0 eV. The characteristics of polycrystalline and anisotropic growth were confirmed via normalized X-ray diffraction (XRD), high-resolution transmission electron microscopy (HRTEM), and selected-area electron diffraction (SAED) patterns. The amount of incorporated nitrogen was analyzed via secondary ion mass spectrometry (SIMS) to examine the effects of oxidation temperature. Furthermore, the ionization energy of the acceptor in the films oxidized at 1000, 1050, and 1100 °C was calculated and analyzed using temperature-dependent Hall test results. The results indicated that nitrogen doping played a significant role in determining p-type electrical properties. The activation energy of polycrystalline β-Ga₂O₃, prepared via the thermal oxidation of GaN in the N₂O atmosphere, was estimated to be 147.175 kJ·mol⁻¹ using an Arrhenius plot. This value was significantly lower than that obtained via both the dry and wet oxidation of GaN under O₂ ambient conditions, thus confirming the higher efficiency of the thermal oxidation of GaN in a N₂O atmosphere.