Neutrons with energies between 0.1 and 10 MeV can significantly impact the soft error rate (SER) in SRAMs manufactured in scaled technologies, with respect to high-energy neutrons. Their contribution is evaluated in accelerator, ground-level, and avionic (12 km of altitude) environments. Experimental cross sections were measured with monoenergetic neutrons from 144 keV to 17 MeV, and the results benchmarked with Monte Carlo simulations. It was found that even 144 keV neutrons can induce upsets due to elastic scattering. Moreover, neutrons in the 0.1-10 MeV energy range can induce more than 60% of the overall upset rate in accelerator applications, while their contribution can exceed 18% in avionics. The SER due to neutrons below 3 MeV, whose contribution has always been considered negligible, is found to be up to 44% of the total upsets in accelerator environments. These results have strong radiation hardness assurance (RHA) implications for those environments with high fluxes of neutrons in the 0.1-10 MeV energy range.

Combined effects of electrical stress and neutron irradiation of the last generation of commercial discrete silicon carbide power MOSFETs are studied. The Single Event Burnout (SEB) sensitivity during neutron irradiation is analyzed for unstressed and electrically stressed devices. For surviving devices, a comprehensive study of the breakdown voltage degradation is performed by coupling electrical stress and irradiation effects. In addition, mutual influences between electrical stress and radiative constraints are investigated through TCAD modeling.

The mechanisms responsible for neutron-induced single-event burnout (SEB) in commercial silicon carbide power MOSFETs under atmospheric-like neutron spectrum were investigated and analyzed. The combined effect of applied reverse gate voltage and drain voltage was evaluated. First, local analysis of the packaged device at the wafer level is performed to reveal the failure mechanism inside the semiconductor lattice. Second, based on gate stress testing of surviving devices and looking at the influence of reverse gate bias during irradiation, an enhanced failure sensitivity especially for drain voltage values close to the safe operating area was demonstrated. In addition to support this assumption, TCAD simulations with damage sites were performed in order to address physical mechanisms related to gate leakage degradation and SEB.

This paper presents a methodology for analyzing the behavior of nanometer technologies regarding "multiple event transients" (MET) caused by nuclear reaction induced by atmospheric neutrons. For the first time, currents collected by several sensitive areas of an ASIC cell resulting from a nuclear reaction are addressed by simulation. Libraries of several thousand types of currents are obtained for neutron energy range between 1 and 200 MeV. Group of currents are simultaneously injected at SPICE level and their effects are monitored on the cell output. Following an amplitude criterion, output transient duration and associated occurrence probability are recorded. A 130 nm NAND gate from ATMEL Corporation is first used to illustrate the methodology and a comparison between single event transients and multiple event transients effects is presented Finally, results regarding five different combinational cells in the ATMEL 130 nm library are presented and discussed.

In this paper, the suitability of floating gate dosimeter as total ionizing dose (TID) detector in mixed fields, representative of large hadron collider (LHC) radiation environment, has been investigated. Several experiments were performed in order to characterize the dosimeter. Exposures to γ-ray were carried out to study the sensitivity and linearity of the radiation response. Experiments in mixed radiation field were performed at CERN High energy AcceleRator Mixed field facility (CHARM) at CERN together with RadFETs to compare the performances. In particular, the minimum dose to be cumulated in order to obtain the facility calibration factor has been evaluated and discussed. The effect of the temperature on the output signal has been characterized and a compensation method has been developed and implemented. The fading of the output after irradiation was measured in order to evaluate the retention of the analog information.

In addition to high-energy hadrons, which include neutrons, protons and pions above 20 MeV, thermal neutrons are a major concern in terms of Soft Error Rate (SER) for electronics operating in the Large Hadron Collider (LHC) accelerator at CERN. Most of the electronic devices still contain Boron-10 inside their structure, which makes them sensitive to thermal neutrons. The LHC radiation environment in different tunnel and shielded areas is analyzed through measurements and FLUKA simulations, showing that the thermal neutron fluence can be considerably higher than the high energy one, up to a factor of 50. State-of-the-art Commercial Off The Shelf (COTS) components such as SRAM, FPGA and Flash memories of different technologies are studied to derive the expected Single Event Upset (SEU) rate due to thermal neutrons, relative to the high-energy hadron contribution. We find that, for the studied parts and most of the accelerator applications, thermal neutrons are the dominating source of upsets with respect to the high energy particles yielding even to neglect the latter in some cases. Indeed, they can induce in electronics up to more than 90% of the total upsets. The estimation is performed also for ground level and avionic applications, and although in general thermal neutrons are not the main source of SER, in Flash memories they can play the same role as high energy neutrons. Related Radiation Hardness Assurance (RHA) considerations for the qualification of components and systems against thermal neutrons are presented.