The miniaturization of optical switches is a promising prospect with the use of phase-change materials (PCMs), and exploring various strategies to effectively integrate PCMs with integrated optical waveguides represents an intriguing research question. In this study, an ultra-compact integrated optical switch based on PCM is proposed. This device consists of a Ge${}_2$Sb${}_2$Te${}_5$ nano-disk and an inverse-designed pixelated sub-wavelength structure. The pixelated sub-wavelength structure offers customized refractive indices that conventional materials or structures cannot achieve, leading to an improved insertion loss (IL) and extinction ratio (ER) performance of the device. Furthermore, this structure enhances the interaction between the optical field and GST, resulting in a reduction of the device size and the inserted GST footprint. With an ultra-compact device footprint of 0.9 µm × 1.5 µm, the simulation results exhibit a low IL of 0.45 dB, and a high ER of 18.0 dB at 1550 nm. Additionally, relevant studies show that this device is able to perform reliably despite minor variations in the manufacturing process.

Electron accelerators are essential equipment in science and industry. However, their large footprint, ranging in length up to kilometers, limits their availability. Hence, compact solution to this problem is one of the major trends in advance accelerators. In this paper, a design of micro-scale electron accelerator based on surface plasmons is proposed. Due to the near-field enhancement effect of plasmons, this structure establishes extremely strong field for acceleration within less than $1\mathrm{\mu }\mathrm{m}$. Simulation results shows that driven by infrared laser, the designed accelerator with 5 GV/m peak field deliver more than 0.39 keV energy to electrons. Cascaded in chain, this structure can realize fully electron acceleration, and has the potential of becoming the critical element of future integrated free electron light source lab on chip.

A photonic radar with real-time detection ability and multi-band agility is proposed and demonstrated. In the proposed scheme, a dual-polarization Mach-Zehnder modulator (DP-MZM) coupled by an optical pulse from mode locked laser (MLL) is used to implement baseband signal sampling and echo signal receiving in orthogonal polarization, independently. After extracting the baseband signal under optical sampling from partial output signal of DP-MZM, it is transformed to microwave signal, in which, by choosing specific harmonic mixing signal with bandpass filter at electronic transmitter, the up-conversion radar transmitting signal in expected band is obtained. Meanwhile, another partial of optical signal from DP-MZM is polarization demultiplexed to the optical reference signal and receiving signal by a polarization beam splitter. Then, the de-chirping of radar echo signal can be completed with a balanced photodetector for balanced detection the optical reference signal and receiving signal. By conducting the proof-of-concept experiments, the feasibility of the proposed system is verified in K-band with a range resolution 2.22 cm. Furthermore, the multi-band agility of radar can be realized with adjusting the passband of radar electronic transmitter.

The generation of high-speed digital vector is one of the main problems in IC testing. With the increasing of the working frequency of digital circuits, the speed and accuracy of digital test vector are also required to be higher and higher. Based on FPGA high-speed transceiver, this paper provides a method of generating high-speed digital integrated circuit test vectors. It also introduces the specific implementation of high-speed digital pattern synthesis and broadening, and explains the possible situations in it. The resulting test vector speed is up to 800Mbps and the edge positioning accuracy can reach 40ps.

We demonstrate a disaggregated optically-connected memory (OCM) architecture that supports dynamic resource allocation. Our proposed architecture utilizes a hitless wavelength-selective switch (WSS) based on silicon photonic (SiP) micro-ring resonators (MRRs) embedded with an equal-armed Mach-Zehnder interferometer, which permits a hitless rerouting of multi-wavelength signals. Error-free operation is achieved between a CPU node and two remote memory nodes using silicon photonic switch fabrics, showing the potential of integrating the photonic switched optically connected memory pools to the large-scale data centers and high performance computing (HPC) systems.

Portability and low cost make the PXIe system the best choice to reduce the cost of integrated circuit(IC) testing. However, due to the limitation of the PXIe module volume, the number of channels in a single module cannot be enough. And the testing of an IC with more pins will require multiple modules to achieve. In general, the synchronization performance between channels will be one of the most important indicators which affect the test capability of an IC test system. In this paper, a method which based on calibration to achieve synchronization between test channels in the IC test system is proposed. Through testing, toe time delay between board-level channels is <±100ps, the time delay of channels between modules of a PXIe system is <±1ns, and the time delay of channels between PXIe systems is <±2ns.