Characterizing mixed hot-carrier/bias temperature instability (BTI) degradation in full { $\textit {V}_{\text{G}}$ , $\textit {V}_{\text{D}}$ } bias space is a challenging task. Therefore, studies usually focus on individual degradation mechanisms, such as BTI and hot-carrier degradation (HCD). However, a simple superposition of these mechanisms at an arbitrary { $\textit {V}_{\text{G}}$ , $\textit {V}_{\text{D}}$ } combination often fails to predict the cumulative damage. We experimentally acquired a large data set covering the full bias space of a pMOSFET which allows us to obtain detailed degradation and recovery maps. Our models for describing oxide and interface defects provide physical insights into the underlying mechanisms and a possible interplay between the degradation modes. Additionally, we perform a dedicated experiment to reveal the implications of different stress regimes onto the various types of defects by switching BTI and HCD stress conditions. The results clearly reveal the conceptual limits of the assumption of independent degradation regimes.

In this paper, we examine the interplay of two serious reliability issues in MOSFET devices, namely, bias temperature instability (BTI) and hot-carrier degradation (HCD). Most publications are devoted to the characterization of either BTI or HCD, and complex models have been developed to independently describe each degradation mode. However, very limited data are available on the interplay of both degradation regimes, particularly the effect of a drain bias onto the charging and discharging dynamics of oxide traps. Part I of this paper provides an extensive experimental study toward the impact of mixed-mode stress conditions on the dynamics of oxide defects. Here, we present the first microscopic modeling approach beyond a simple electrostatic approximation. We extend the existing nonradiative multiphonon theory by taking nonequilibrium processes such as full carrier distribution functions which include the effect impact ionization along the channel into account. To ultimately validate our framework, we compare simulation results and experimental data for a single-oxide defect as well as a large ensemble of traps in a MOSFET device. We show that our modeling approach accurately captures the rather puzzling measurement trends for a broad stress regime and allows developing the knowledge on how oxide defects can be affected by an increased drain stress.

Transistors fabricated on SiC substrates show superior properties for their application in high-power electronics. However, the performance of SiC MOSFETs in general can still not be completely exploited yet due to a higher defect density compared to Si/SiO 2 based devices. The defects give rise to a distinct hysteresis in the transfer characteristics and increased drifts of the threshold voltage over time, i.e. bias temperature instabilities, making accurate time-to-failure analysis more challenging. In our work we carefully analyze lateral channel SiC MOSFETs utilizing measure-stress-measure (MSM) schemes. To explain the experimental data we perform physics based device simulations considering the impact of a large set of single defects employing a two-state non-radiative multiphonon defect model. This approach allows us to extract defect bands for electron and hole trapping and to link them to possible defect structures proposed in the literature. Additionally, we compare simulation results employing our extracted trap bands with MSM data measured on vertical channel devices. Finally, an accurate lifetime prediction at operating conditions is presented.

Hot-carrier-induced degradation of short p-channel field-effect transistors in the presence of externally applied vertical mechanical force is investigated. The mechanical stress was induced in the devices by applying a normal load with a nanoindenter. Using finite element modeling, the induced stress to the channel was estimated to reach GPa range. It is shown that compressive mechanical stress considerably enhances the impact ionization rate and the generation of secondary electron-hole pairs. These can be trapped in the gate oxide and cause a hot-electron-induced punch-through effect and effective p-channel length reduction even after both mechanical and electrical stresses are removed. The presented findings indicate the importance of mechanical stress control and engineering for improving the device reliability.

The interaction of charge carriers with hydrogen-related defects plays a key role in modern semiconductor applications. Particularly in the field of micro- and nanoelectronics, where silicon together with amorphous gate oxides is still the technology of choice, $\mathrm{Si}$—H bonds participate in a rich variety of phenomena. For example, the passivating nature of H and its influence on surface reconstruction are fundamentally useful features for modern technologies and emerging research fields alike. However, the dissociation of $\mathrm{Si}$—H bonds results in electrically active defects and is associated with a number of device reliability issues. In this work we develop a general quantum kinetic formulation to describe the dynamics of bond excitation and breaking. The wealth of experimental and theoretical studies on $\mathrm{Si}$—H bond breaking induced by energetic carriers enables us to extract the most useful excitation pathways. Based on the open-system density-matrix theory we develop a model that accounts for all relevant system-bath interactions: vibrational relaxation and dipole scattering as well as resonance-induced excitation. In contrast to existing theoretical studies, our model is coupled to a Boltzmann transport equation solver, which is required for the correct consideration of nonequilibrium carrier energy distribution functions occuring in an electronic device. Finally, we apply our framework to model $\mathrm{Si}$—H bond breakage at the ${\mathrm{Si/SiO}}_2$ interface and validate our approach against different experimental data sets. The results provide a fundamental understanding of $\mathrm{Si}$—H dissociation mechanisms and allow for an accurate microscopic description of hot-carrier-induced damage at the device level. Due to the model formulation being free of empirical parameters, the approach can be easily applied to future technologies and materials systems.