Short-gate AlGaN/GaN heterostructure field-effect transistors (HFETs) with extremely thin AlGaN barrier layers were fabricated and characterized from the viewpoint of millimeter-wave applications. The devices showed good direct current and small-signal characteristics; however, the 30-GHz power characteristics were degraded due to frequency dispersion caused by the SiN_x/AlGaN interface states. The dispersive behavior of the thin barrier devices measured in pulse I-V curves was different from the commonly observed one for the devices with normal AlGaN barrier thicknesses of 20-30 nm. The first characteristic point was that it happened only for structures with extremely thin barrier layers. As another unique point, the drain current collapse in the pulsed modes was observed only at a positive gate bias. We consider that the unique dispersion of the thin barrier HFETs was caused by the different charging paths related to hot electrons accelerated in a high electric field region of a 2-D electron gas (2DEG) channel. It seems reasonable to suppose that, for the extremely thin barrier structures, the AlGaN surface states can be charged not only by injected electrons from the gate metal through the SiN_x/AlGaN interface but also by the hot electrons overcoming the barrier from the 2DEG formed at the AlGaN/GaN interface.

Herein, by modulating 2DEG concentration ( n _s ), a superior GaN RF HEMT with a high-Al-content AlGaN barrier is reported for high power-density ( P _out ) X-band applications. Thanks to a high n _s of 1.3×10 ¹³ cm ^-2 enabled by the Al _0.32 Ga _0.68 N barrier, as well as the regrown n ⁺ -GaN ohmic contacts, the device exhibits an output drain current ( I _D ) of 1.6 A/mm, an on-resistance ( R _ON ) of 1.10 Ω·mm, and maintain a breakdown electric field ( E _BC ) of ~0.8 MV/cm. As a result, at 10 GHz, P _out of 10.4 W/mm and power-added efficiency (PAE) of 63.2% are obtained at a moderate drain bias ( V _D ) of 28 V. Notably, the results of I _D – E _BC , P _out – V _D , and the figure-of-merit P _out / V _D of our device marks one of the best records among X-band GaN HEMTs, showing strong competitiveness of high-Al-content AlGaN/GaN HEMTs for high- P _out RF applications.

A report is presented on the power performance of deep submicron AlGaN/GaN high electron mobility transistors grown by ammonia molecular beam epitaxy. At 10 GHz, 70% power-added-efficiency (PAE) and 3 W/mm power density were demonstrated at a drain bias of 20 V. At 30 GHz, 31% PAE and 6.5 W/mm power density were achieved at a drain bias of 40 V.

The prosperity of quantum computing has boosted the development of cryogenic electronics. The wide bandgap GaN-based devices show the potential to develop such cryogenic systems thanks to their decent characteristics in harsh environments. However, robust and reliable device & circuit models for GaN devices are still absent and urgently in demands. Herein, we report an artificial neural network (ANN) based compact model for both device- and circuit-level characteristics of GaN HEMTs within a wide temperature range from 300 to 4.2 K. Based on the built ANN architecture, the DC and RF device models are produced which can quickly capture and predict the relationship between device performance and multiple variables including ambient temperatures, operating frequencies, biased voltages, and device sizes, with high accuracy over 99%. Furthermore, the ANN models are implemented in the circuit design of a GaN monolithic microwave integrated circuit (MMIC), showing a mean relative error (MRE) value of less than 4% under both 300 K and 4.2 K compared with measured results. These results verified the robustness and generalization abilities of the proposed ANN models in the tape-out production of GaN-based devices and circuits for future quantum and cryogenic electronics applications.

Herein, we report a thick-AlN-barrier (TAB) based AlN/GaN RF HEMT with remarkable power performance at low voltage for sub-6G applications. Featuring a 7 nm AlN barrier layer and the regrown n+-GaN Ohmic contacts, the device shows low sheet and contact resistances, leading to 1.6-A/mm output current, 3-V knee voltage, and consequent 75% power-added efficiency (PAE) and 1.3-W/mm output power density (Pout) at 2.6 GHz and 6-V drain voltage (VDS). This PAE-Pout result represents the state-of-the-art levels of low-voltage power amplifiers (LV PAs) for sub-6G applications. Meanwhile, the TAB-HEMT is found to exhibit satisfactory linearity and noise performance as well. The OIP3 (output third-order intercept point) value of 35.3 dBm is obtained at 6-V VDS, thanks to the elaborately designed thick AlN barrier. A minimum noise figure (NFmin) as low as 0.32 dB at 2.6 GHz and VDS = 6 V is achieved thanks to the suppressed thermal noise enabled by low channel resistance. These results highlight the potential of the TAB-HEMT as an all-around and compact device platform for LV RF front-end-module applications.

In power conversion systems, the power devices often need to block high voltage levels during the OFF-state. The impact of such voltage stress can cause instability for the device. This article presents the investigation of the pulsed ${I}$ – ${V}$ (PIV) OFF-state drain stress test for the etch-free hydrogen plasma-treated p-GaN gate HEMT (H-treated devices). To quantitatively demonstrate the effect of the hydrogen plasma treatment process, the device with conventional p-GaN etching at the access region (etched devices) is monolithically fabricated. Remarkably, the hydrogen treatment could eliminate surface damage from the conventional etching process and provide passivation at the access region. The direct comparison of devices’ threshold voltage ( ${V} _{\text {TH}}$ ) shift and dynamic ON-resistance ( ${R} _{\text {on}}$ ) is obtained. Under a 200-V OFF-state drain stress, the H-treated device has a low ${V} _{\text {TH}}$ shift of 0.18 V, and the dynamic ${R} _{\text {on}}$ could also be efficiently suppressed by 24%. Meanwhile, the H-treated device has only a marginal 5% current reduction compared with 48% for the etched device at 200-V stress. An exploration of the origin of the superior device performances is carried out with the TCAD simulation, activation energy derivation, and capacitance measurement. For the H-treated device, the surface state improvement at the region and the reduction of the peak electric field at the gate edge become major reasons for the improved performance.