We demonstrate high-performance nonvolatile HfO ₂ nanocrystal memory utilizing spinodal phase separation of Hf-silicate thin film by 900/spl deg/C rapid thermal annealing. With this technique, a remarkably high nanocrystal density of as high as 0.9 /spl sim/ 1.9 × 10/sup 12/ cm/sup -2/ with an average size <10 nm can be easily achieved. Because HfO ₂ nanocrystals are well embedded inside an SiO ₂ -rich matrix and due to their sufficiently deep energy level, we, for the first time, have demonstrated superior characteristics of the nanocrystal memories in terms of a considerably large memory window, high-speed program/erase (P/E) (1 μs/0.1 ms), long retention time greater than 10/sup 8/ s for 10% charge loss, and excellent endurance after 10 ⁶ P/E cycles.

This paper describes the structural and electrical properties of <mml:math display="inline"><mml:mrow><mml:msub><mml:mi mathvariant="normal">Al</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>Al2O3 thin films grown through atomic layer deposition onto Ge substrates over a wide deposition temperature range <mml:math display="inline"><mml:mrow><mml:mo>(</mml:mo><mml:mn>50</mml:mn><mml:mo>–</mml:mo><mml:mn>300</mml:mn><mml:mo>°</mml:mo><mml:mi mathvariant="normal">C</mml:mi><mml:mo>)</mml:mo></mml:mrow></mml:math>(50–300°C) . From grazing-incidence X-ray reflectivity and X-ray photoelectron spectroscopy, we found that increasing the deposition temperature improved the <mml:math display="inline"><mml:mrow><mml:msub><mml:mi mathvariant="normal">Al</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>Al2O3 film density and its dielectric stoichiometry; nevertheless, dielectric intermixing between main <mml:math display="inline"><mml:mrow><mml:msub><mml:mi mathvariant="normal">Al</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>Al2O3 and interfacial <mml:math display="inline"><mml:mrow><mml:mi mathvariant="normal">Ge</mml:mi><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>GeO2 appeared at temperatures above <mml:math display="inline"><mml:mrow><mml:mn>200</mml:mn><mml:mo>°</mml:mo><mml:mi mathvariant="normal">C</mml:mi></mml:mrow></mml:math>200°C , along with degradation of the <mml:math display="inline"><mml:mrow><mml:mi mathvariant="normal">Ge</mml:mi><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:mo>∕</mml:mo><mml:mi mathvariant="normal">Ge</mml:mi></mml:mrow></mml:math>GeO2∕Ge interface. Accordingly, a relatively large gate leakage current <mml:math display="inline"><mml:mrow><mml:mo>(</mml:mo><mml:msub><mml:mi>J</mml:mi><mml:mi mathvariant="normal">g</mml:mi></mml:msub><mml:mo>)</mml:mo></mml:mrow></mml:math>(Jg) and a high density of interfacial states <mml:math display="inline"><mml:msub><mml:mi>D</mml:mi><mml:mi>it</mml:mi></mml:msub></mml:math>Dit <mml:math display="inline"><mml:mrow><mml:mo>(</mml:mo><mml:mo></mml:mo><mml:msup><mml:mrow><mml:mn>10</mml:mn></mml:mrow><mml:mrow><mml:mn>13</mml:mn></mml:mrow></mml:msup><mml:mspace width="0.3em"></mml:mspace><mml:msup><mml:mi>cm</mml:mi><mml:mrow><mml:mo>−</mml:mo><mml:mn>2</mml:mn></mml:mrow></mml:msup><mml:mspace width="0.3em"></mml:mspace><mml:msup><mml:mi>eV</mml:mi><mml:mrow><mml:mo>−</mml:mo><mml:mn>1</mml:mn></mml:mrow></mml:msup><mml:mo>)</mml:mo></mml:mrow></mml:math>(1013cm−2eV−1) were observed as a result of deterioration of the entire <mml:math display="inline"><mml:mrow><mml:msub><mml:mi mathvariant="normal">Al</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub><mml:mo>∕</mml:mo><mml:mi mathvariant="normal">Ge</mml:mi></mml:mrow></mml:math>Al2O3∕Ge structure at higher deposition temperatures. In addition, although subsequent high-temperature processing at <mml:math display="inline"><mml:mrow><mml:mn>600</mml:mn><mml:mo>°</mml:mo><mml:mi mathvariant="normal">C</mml:mi></mml:mrow></mml:math>600°C in a <mml:math display="inline"><mml:msub><mml:mi mathvariant="normal">N</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub></mml:math>N2 ambient could relieve the oxygen-excessive behavior further, i.e., to provide a more stoichiometric film, the accompanying <mml:math display="inline"><mml:mrow><mml:mi mathvariant="normal">Ge</mml:mi><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mi>x</mml:mi></mml:msub></mml:mrow></mml:math>GeOx volatilization close to the dielectric interface caused greater damage to the electrical performance. Only forming gas annealing ( <mml:math display="inline"><mml:mrow><mml:msub><mml:mi mathvariant="normal">H</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:mo>∕</mml:mo><mml:msub><mml:mi mathvariant="normal">N</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>H2∕N2 , 1:10) at low temperature <mml:math display="inline"><mml:mrow><mml:mo>(</mml:mo><mml:mn>300</mml:mn><mml:mo>°</mml:mo><mml:mi mathvariant="normal">C</mml:mi><mml:mo>)</mml:mo></mml:mrow></mml:math>(300°C) improved the capacitance–voltage characteristics of the <mml:math display="inline"><mml:mrow><mml:mi mathvariant="normal">Pt</mml:mi><mml:mo>∕</mml:mo><mml:msub><mml:mi mathvariant="normal">Al</mml:mi><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub><mml:mo>∕</mml:mo><mml:mi mathvariant="normal">Ge</mml:mi></mml:mrow></mml:math>Pt∕Al2O3∕Ge structure, in terms of providing a lower value of <mml:math display="inline"><mml:msub><mml:mi>D</mml:mi><mml:mi>it</mml:mi></mml:msub></mml:math>Dit (ca. <mml:math display="inline"><mml:mrow><mml:mn>6</mml:mn><mml:mo>×</mml:mo><mml:msup><mml:mrow><mml:mn>10</mml:mn></mml:mrow><mml:mrow><mml:mn>11</mml:mn></mml:mrow></mml:msup><mml:mspace width="0.3em"></mml:mspace><mml:msup><mml:mi>cm</mml:mi><mml:mrow><mml:mo>−</mml:mo><mml:mn>2</mml:mn></mml:mrow></mml:msup><mml:mspace width="0.3em"></mml:mspace><mml:msup><mml:mi>eV</mml:mi><mml:mrow><mml:mo>−</mml:mo><mml:mn>1</mml:mn></mml:mrow></mml:msup></mml:mrow></mml:math>6×1011cm−2eV−1 ), a lower value of <mml:math display="inline"><mml:msub><mml:mi>J</mml:mi><mml:mi>g</mml:mi></mml:msub></mml:math>Jg , and a reduced hysteresis width.

We report the demonstration of growing two-dimensional (2D) hexagonal-AlN (h-AlN) on transition metal dichalcogenide (TMD) monolayers (MoS₂, WS₂, and WSe₂) via van der Waals epitaxy by atomic layer deposition (ALD). Having atomically thin thickness and high theoretical carrier mobility, TMDs are attractive semiconductors for future dense and high-performance 3D IC, and 2D hexagonal boron nitride (h-BN) as a gate dielectric is known to significantly improve TMD device performance. However, h-BN growth requires 1000 °C temperature that is not compatible with CMOS fabrication, and ALD deposition of any high-k 2D insulator on TMD continues to be an elusive goal. The epitaxial 2D layered h-AlN by low-temperature ALD is characterized by synchrotron-based grazing-incidence wide-angle x-ray scattering and high-resolution transmission electron microscopy. In addition, we demonstrate the feasibility of using layered h-AlN as an interfacial layer between WS₂ and ALD HfO₂. The significantly better uniformity and smoothness of HfO₂ than that directly deposited on TMD are desirable characteristics for TMD transistor applications.

This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically V_th-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady V_th adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording.

In this letter, the authors propose a practical and reliable approach—using deposited multiwalled carbon nanotubes (MWCNTs) as source and drain electrodes—for reducing the contact resistance $\left(R_c\right)$ in pentacene-based bottom-contact thin-film transistors. The value of $R_c$ of the devices was closely linked to the resultant length of the deposited MWCNTs; the lowest value was $3\times {10}^8\Omega \mu \mathrm{m}$ . The largest saturation mobility was $0.14{\mathrm{cm}}^2∕\mathrm{V}\mathrm{s}$ ; this value reached up to three times higher when the threshold voltage was determined using the maximum transconductance $\left(G_{m,\max }\right)$ extrapolation method, rather than the constant current method. The on/off ratio was more than ${10}^6$ .

In this article, a 0.7 nm thick monolayer MoS₂ nanosheet gate-all-around field effect transistors (NS-GAAFETs) with conformal high-κ metal gate deposition are demonstrated. The device with 40 nm channel length exhibits a high on-state current density of ~410 μA μm⁻¹ with a large on/off ratio of 6 × 10⁸ at drain voltage = 1 V. The extracted contact resistance is 0.48 ± 0.1 kΩ μm in monolayer MoS₂ NS-GAAFETs, thereby showing the channel-dominated performance with the channel length scaling from 80 to 40 nm. The successful demonstration of device performance in this work verifies the integration potential of transition metal dichalcogenides for future logic transistor applications.