Ammar Masaoud

Mr. Ammar Masaoud


Research Focus & Metrics

Academic Career Length

21Years (2006-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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15 August 2019 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
SMSheikh Tanzim Meraj
Sheikh Tanzim Meraj
Kamrul HasanKamrul Hasan
Kamrul Hasan
AMAmmar Masaoud
Ammar Masaoud
This paper introduces a novel configuration of multilevel inverter (MLI) with low number of power electric components. The inverter is a combination of two back to back T-type modules using two cross connected switches. This inverter can operate using DC sources having either same or different voltage ratings. The proposed inverter can also be extended using cascaded connection to obtain higher voltage levels. This MLI and its extensions are suitable for other applications where high voltage is required. The major feature of this MLI, is the formation of negative voltage levels without using any H-bridge circuit. Some other advantages of this MLI are; low total harmonic distortion (THD) and highly efficient output voltage. A low frequency modulation technique known as nearest level control (NLC) is applied to produce the high quality output voltage. The simulation was done using MATLAB/Simulink while the hardware prototype is build using TMS320F28335 digital signal processor. The performance of the proposed MLI is validated by obtaining the accurate simulation and experimental results.

1 September 2013 in IET Power Electronics
Verified
Journal Article
Open access
PDF file
HBHamza Belkamel
Hamza Belkamel
Saad MekhilefSaad Mekhilef
Saad Mekhilef
AMAmmar Masaoud
Ammar Masaoud
MNMohsen Abdel Naeim
Mohsen Abdel Naeim
Series connection of power cells in asymmetrical cascaded configurations helps to cancel redundant output levels and maximise the number of different levels generated by the inverter. A new configuration of three‐phase multilevel asymmetrical cascaded voltage source inverter is presented. This structure consists of series‐connected sub‐multilevel inverters blocks. The number of utilised switches, insulated gate driver circuits, voltage standing on switches, installation area and cost are considerably reduced. Cascaded‐cell DC voltages in each inverter leg form an arithmetic sequence with common difference of E . With the selected inverter DC sources, high‐frequency pulse‐width modulation (PWM) control methods can be effectively applied without loss of modularity. Low‐frequency and sinusoidal PWM techniques were successfully applied. Hence, high flexibility in the modulation of the proposed inverter is demonstrated. The prototype of the suggested inverter was manufactured and the obtained simulation and hardware results ensured the feasibility of the configuration, and the compatibility of both modulation techniques was accurately noted. Lastly, the semiconductor losses in the converter were calculated using simulation models. Based on the analysis of the total power losses, the proposed inverter provided high efficiency at different operating conditions.

9 January 2014 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
AMAmmar Masaoud
Ammar Masaoud
HPHew Wooi Ping
Hew Wooi Ping
Saad MekhilefSaad Mekhilef
Saad Mekhilef
ATAyoub Suliman Taallah
Ayoub Suliman Taallah
In this paper, a new configuration of a three-phase five-level multilevel voltage-source inverter is introduced. The proposed topology constitutes the conventional three-phase two-level bridge with three bidirectional switches. A multilevel dc link using fixed dc voltage supply and cascaded half-bridge is connected in such a way that the proposed inverter outputs the required output voltage levels. The fundamental frequency staircase modulation technique is easily used to generate the appropriate switching gate signals. For the purpose of increasing the number of voltage levels with fewer number of power electronic components, the structure of the proposed inverter is extended and different methods to determine the magnitudes of utilized dc voltage supplies are suggested. Moreover, the prototype of the suggested configuration is manufactured as the obtained simulation and hardware results ensured the feasibility of the configuration and the compatibility of the modulation technique is accurately noted.

19 July 2021 in IEEE Access
Verified
Journal Article
Open access
JIJahedul Islam
Jahedul Islam
SMSheikh Tanzim Meraj
Sheikh Tanzim Meraj
AMAmmar Masaoud
Ammar Masaoud
Md Apel MahmudMd Apel Mahmud
Md Apel Mahmud
ANAmril Nazir
Amril Nazir
FMFarhan Mumtaz
Farhan Mumtaz
Selective harmonic elimination (SHE) technique is used in power inverters to eliminate specific lower-order harmonics by determining optimum switching angles that are used to generate Pulse Width Modulation (PWM) signals for multilevel inverter (MLI) switches. Various optimization algorithms have been developed to determine the optimum switching angles. However, these techniques are still trapped in local optima. This study proposes an opposition-based quantum bat algorithm (OQBA) to determine these optimum switching angles. This algorithm is formulated by utilizing habitual characteristics of bats. It has advanced learning ability that can effectively remove lower-order harmonics from the output voltage of MLI. It can eventually increase the quality of the output voltage along with the efficiency of the MLI. The performance of the algorithm is evaluated with three different case studies involving 7, 11, and 17-level three-phase MLIs. The results are verified using both simulation and experimental studies. The results showed substantial improvement and superiority compared to other available algorithms both in terms of the harmonics reduction of harmonics and finding the correct solutions.

1 December 2014 in IET Power Electronics
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Journal Article
Open access
PDF file
AMAmmar Masaoud
Ammar Masaoud
HPHew Wooi Ping
Hew Wooi Ping
Saad MekhilefSaad Mekhilef
Saad Mekhilef
ATAyoub Taallah
Ayoub Taallah
A new multilevel DC‐link three‐phase five‐level voltage source inverter topology is introduced here. A multilevel DC‐link formed from single DC voltage supply and two cascaded half‐bridge (CHB) power cells is connected to 12‐switch three‐phase bridge in such a way that the proposed inverter produces five levels in the output voltage waveform. Compared to comparable inverters, such as symmetrical CHB and hybrid multilevel inverters, the proposed topology maximises the number of voltage levels and reduces the number of utilised DC voltage supplies, switches, gate driver circuits and installation area. A modified fundamental frequency modulation technique based on determination of switching states of inverter is developed, to generate the appropriate switching gate signals. Furthermore, to validate the proposed topology, a low power prototype inverter has been built. The obtained simulation and experimental results ensure the feasibility of the suggested topology and also the compatibility of the used modulation technique.

27 March 2012 in Sensors
Verified
Journal Article
Open access
PDF file
KGKhalaf Gaeid
Khalaf Gaeid
HPHew Wooi Ping
Hew Wooi Ping
MMMustafa Khalid Masood
Mustafa Khalid Masood
AMAmmar Masaoud
Ammar Masaoud
Fault Tolerant Control (FTC) systems are crucial in industry to ensure safe and reliable operation, especially of motor drives. This paper proposes the use of multiple controllers for a FTC system of an induction motor drive, selected based on a switching mechanism. The system switches between sensor vector control, sensorless vector control, closed-loop voltage by frequency (V/f) control and open loop V/f control. Vector control offers high performance, while V/f is a simple, low cost strategy with high speed and satisfactory performance. The faults dealt with are speed sensor failures, stator winding open circuits, shorts and minimum voltage faults. In the event of compound faults, a protection unit halts motor operation. The faults are detected using a wavelet index. For the sensorless vector control, a novel Boosted Model Reference Adaptive System (BMRAS) to estimate the motor speed is presented, which reduces tuning time. Both simulation results and experimental results with an induction motor drive show the scheme to be a fast and effective one for fault detection, while the control methods transition smoothly and ensure the effectiveness of the FTC system. The system is also shown to be flexible, reverting rapidly back to the dominant controller if the motor returns to a healthy state.