Xi Liu

Mr. Xi Liu


Research Focus & Metrics

Academic Career Length

4Years (2023-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

View All Publications
30 November 2023 in Electronics
Verified
Journal Article
Open access
PDF file
XLXi Liu
Xi Liu
HLHui Li
Hui Li
YWYingzhe Wu
Yingzhe Wu
LWLisheng Wang
Lisheng Wang
SYShan Yin
Shan Yin
In order to effectively avoid the shoot-through issue of the semiconductor device (such as the power metal-oxide-semiconductor field-effect transistor (MOSFET)) adopted in the phase leg of the motor drives, a dead-time zone should be inserted. However, the nonlinearity caused by the dead-time effect will bring about voltage/current distortion, as well as high-order harmonics, which largely degrades the performance of motor drives, especially in low-speed operations with slight loads. In this paper, a dead-time compensation method is proposed to suppress such side effects caused by dead-time zones and improve the performance of motor drives. Compared with other existing methods, the proposed method is mainly focused on the switching characteristics of the power MOSFET, which is directly relative to the compensation time in each pulse-width modulation (PWM) period. Firstly, a detailed derivation process is elaborated to reveal the relationship between compensation time and the switching performance of the MOSFET. Meanwhile, the switching process of the MOSFET is also well analyzed, which summarizes the variations in the switching time of the MOSFET with a varied load current. Then, the multipulse test (MPT) is carried out to obtain accurate values of the switching time with the varied load current in a wide range (0–80 A) and form a 2D lookup table. As a result, the compensation method can easily be realized by combining the lookup table and linear interpolation based on the phase current of the motor dynamically. Finally, the effectiveness of the proposed method is verified based on a 12 V permanent magnet synchronous machine (PMSM) drive system. According to the relative experiment results, it can be clearly observed that the time-domain waveform distortion, high-order harmonics, and total harmonic distortion (THD) value are reduced significantly with the proposed dynamic compensation method.

30 September 2025 in Aerospace
Verified
Journal Article
Open access
PDF file
XLXi Liu
Xi Liu
HLHui Li
Hui Li
JLJinshu Lin
Jinshu Lin
CSChen Song
Chen Song
HZHonglang Zhang
Honglang Zhang
HZHengbin Zhang
Hengbin Zhang
Gallium nitride high electron mobility transistors (GaN HEMTs), characterized by their extremely high switching speeds and superior high-frequency performance, have demonstrated significant advantages, and gained extensive applications in fields such as aerospace and high-power-density power supplies. However, their unique internal architecture renders these devices highly sensitive to circuit parasitic parameters. Conventional circuit design methodologies often induce severe issues such as overshoot and high-frequency oscillations, which significantly constrain the realization of their high-frequency performance. To solve this problem, this paper investigates the nonlinear dynamic behavior of GaN HEMTs during switching transients by establishing an equivalent impedance model. Based on this model, a detailed analysis is implemented to elucidate the mechanism by which RC Snubber circuits influence the system’s resonance frequency and the amplitude at the resonant frequency. Through this analysis, an optimal RC Snubber circuit parameter is derived, enabling effective suppression of high-frequency oscillations during the switching transient of GaN HEMT. Experimental results demonstrate that the proposed design achieves a maximum reduction of 40% in voltage overshoot, shortens the ringing time to one-twentieth of the original value, and suppresses noise by 20 dB in the high-frequency range of 20 MHz to 30 MHz, thereby significantly enhancing the stability and reliability of circuit operation. Additionally, considering the heat dissipation requirements in high power density scenarios, this work optimizes the layout of devices, and heat sinks to maintain operational temperatures within safe limits, further mitigating the impact of parasitic parameters on overall system performance.