High-frequency planar transformers and Cockcroft–Walton (CW) rectifiers are essential for developing miniaturized and high-power-density high voltage generators. Parallel resonant converters (PRCs) are commonly used for parasitics integration and high-efficiency operation. However, modeling and designing PRC-$LCLC$ resonant converters with planar transformers and CW voltage multipliers are challenging due to the significant nonlinear parasitics from rectifier diodes and the compensation effects in the resonant tank caused by the discontinuity of rectifier current. To address these challenges, this work proposes a model incorporating nonlinear parasitic capacitance based on the rectified-compensation fundamental mode approximation (RCFMA) method. A novel normalized analysis is conducted on the basis of the resonant frequency of the parallel branch of the RCFMA model, which separates the series-branch-based PRC-$LCLC$ resonant characteristics from the compensation effect of rectifier and nonlinear parasitic capacitance. Furthermore, a voltage-oriented design methodology is introduced. The methodology utilizes the components of the series branch to achieve the step-up voltage gain and zero voltage switching condition for the PRC-$LCLC$ resonant tank. Simultaneously, the parallel branch effectively manages compensation effects and nonlinear parasitic parameters without external capacitors. The proposed design methodology enhances the high-frequency design feasibility, improves the parasitics integration and resolves the conflict between the characteristics design, compensation effects, and the nonlinear parasitic parameters utilization compared to traditional analysis-based designs of PRC-$LCLC$ resonant converters. Finally, the RCFMA model and design methodology are verified through experiments with a gallium nitride-based 25-V/1000-V MHz-frequency PRC-$LCLC$ resonant converter.

Gallium nitride high electron mobility transistors (GaN HEMTs), characterized by their extremely high switching speeds and superior high-frequency performance, have demonstrated significant advantages, and gained extensive applications in fields such as aerospace and high-power-density power supplies. However, their unique internal architecture renders these devices highly sensitive to circuit parasitic parameters. Conventional circuit design methodologies often induce severe issues such as overshoot and high-frequency oscillations, which significantly constrain the realization of their high-frequency performance. To solve this problem, this paper investigates the nonlinear dynamic behavior of GaN HEMTs during switching transients by establishing an equivalent impedance model. Based on this model, a detailed analysis is implemented to elucidate the mechanism by which RC Snubber circuits influence the system’s resonance frequency and the amplitude at the resonant frequency. Through this analysis, an optimal RC Snubber circuit parameter is derived, enabling effective suppression of high-frequency oscillations during the switching transient of GaN HEMT. Experimental results demonstrate that the proposed design achieves a maximum reduction of 40% in voltage overshoot, shortens the ringing time to one-twentieth of the original value, and suppresses noise by 20 dB in the high-frequency range of 20 MHz to 30 MHz, thereby significantly enhancing the stability and reliability of circuit operation. Additionally, considering the heat dissipation requirements in high power density scenarios, this work optimizes the layout of devices, and heat sinks to maintain operational temperatures within safe limits, further mitigating the impact of parasitic parameters on overall system performance.

For gallium nitride (GaN) devices, the relatively immature process technology and cost still limit the single die size. Thus, it becomes necessary to parallel the GaN devices for the high-power applications including the data center and vehicle. Considering the extremely fast switching speed, it is a challenge to parallel the GaN devices. As a consequence, it is of interest to investigate the solution of hybrid switch (HyS) with GaN/Si for the optimized tradeoff between the cost and performance. In addition, the GaN devices still suffer from the issue of dynamic on-resistance (d$R_{\text{DS,on}}$), especially for the hard-switching application. To undertake the switching stress for GaN devices, the use of Si switch may help to improve the system-level long-term reliability. In this work, the GaN/Si HyS is investigated for the hard-switching application considering both reliability and performance. First, an analytical model is built to understand the effects of parasitic parameters and gate-driving delay on the HyS. A gate-driving delay modulation employing quasi-simultaneous switching is proposed based on this model. Furthermore, d$R_{\text{DS,on}}$ of GaN/Si HyS is evaluated via a double pulse test experiment, and d$R_{\text{DS,on}}$ is reduced by 11% compared to the conventional modulation pattern. Finally, a 1-kW, 400-V/48-V synchronous buck converter prototype is demonstrated. It can be found that the GaN/Si HyS achieves the reliability improvement with little efficiency degradation compared with the paralleling GaN while maintaining a 42.5% lower loss than the paralleling Sillicon (Si). It confirms the GaN/Si HyS as an optimal balance between efficiency and reliability for high-power applications.

High-density 380 V–12 V $LLC$ resonant converters typically employ planar transformers with integrated leakage inductance. To achieve Zero-Voltage Switching (ZVS), an air gap is introduced to adjust the magnetizing inductance ($L_m$). However, this gap alters the internal magnetic field (H) distribution. In Center-Tapped (CT) structures, this alteration leads to asymmetric leakage inductances between the positive and negative half-cycles, causing resonant frequency mismatch and performance degradation, particularly under light-load conditions. In this work, the asymmetrical leakage inductance effect in a CT transformer for a 380 V–12 V $LLC$ resonant converter is systematically investigated. A mathematical model is derived to quantify the leakage inductance distribution, revealing that the relative position between the air gap and the windings significantly affects the symmetry. Based on this modeling analysis, the centralized assembly method is identified as the optimal solution to ensure impedance symmetry. The accuracy of the proposed model and the effectiveness of this structure are validated through Finite Element Analysis (FEA) simulations and a hardware prototype of a 250-W, 600-kHz $LLC$ converter. Results demonstrate that this method eliminates the approximately 11% leakage inductance discrepancy (1.8 μH vs. 1.6 μH), ensuring stable operation across the full load range.

In recent years, the gallium nitride high-electron-mobility transistor (GaN HEMT) has been regarded as a promising candidate for high power density and high efficiency applications such as data center, motor drive, and consumer electronics. However, the dynamic on-resistance (RDS_,on) degradation could lead to additional conduction loss and unexpected reliability issues. Thus, the fast and accurate characterization for this parameter is crucial. This paper presents a dynamic RDS_,on measuring circuit with an optimized diode-based clamping circuit for the fast on-state voltage (VDS_,on) measurement. The dynamic response time of the proposed clamping circuit is comprehensively analyzed and evaluated in this paper, and the guidelines for circuit design are given, which are validated by simulations and double pulse test experiments. The experimental results indicate that the proposed clamping circuit could reduce the dynamic response time by nearly 30% compared with the conventional method, and also achieve a faster dynamic response compared with the previous study. Then, the dynamic RDS_,on measurement based on the proposed clamping circuit with different drain-source current sensing methods under the testing conditions of continuous operation, hard switching, and forward conduction is proposed. The details and evaluations of circuit designs are presented. The experimental results demonstrate that both methods could extract the dynamic RDS_,on at 1 μs after the turn-on transient with a tolerance within 1.5%, and with dynamic response times of 47 ns and 144 ns, respectively.

Aerospace power systems, including satellites in low earth orbit (LEO) and geostationary earth orbit (GEO), face stringent thermal constraints to minimize size, weight, and power (SWaP). Gallium nitride (GaN) devices offer superior radiation hardness—critical for the harsh space environment—and MHz-level switching capabilities. This high-frequency operation minimizes passive components, particularly magnetics, thereby reducing the overall volume. However, above 10 MHz, magnetic cores become impractical due to material limitations. To address these issues, this article proposes a design methodology for a GaN-based quasi-square-wave (QSW) buck converter integrated with a PCB air-core inductor. First, the impact of the switching frequency and dead time on the zero-voltage switching (ZVS) condition is elaborated. Then, a power loss model accounting for various loss mechanisms is presented. To overcome high GaN body diode reverse conduction loss, an auxiliary diode is employed. Based on the model, a design procedure is developed to optimize the inductor for 10 MHz operation while maximizing efficiency. To validate the design, a 28 V/12 V, 18 W prototype was built and tested. Experimental results demonstrate a peak efficiency of 86.5% at 10 MHz. The auxiliary diode improves efficiency by 4%, verifying reverse conduction loss mitigation. Thermal analysis confirms a full-load case temperature of 62.2 °C, providing a 47.8 °C safety margin compliant with aerospace derating standards. These findings validate the solution for high-frequency, space-constrained aerospace applications.