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Xibo Yuan
Electrical and Electronic Engineering, University of Bristol, 1980 Bristol, United Kingdom of Great Britain and Northern Ireland, BS8 1UB

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Journal article
Published: 07 July 2021 in IEEE Transactions on Power Electronics
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The common-mode (CM) noise in non-isolated dc-dc converters is mainly caused by the displacement current through the high dv/dt node in the circuit and the associated parasitic capacitance, and it may cause electromagnetic interference (EMI) to the surrounding equipments. To reduce the original CM noise and shrink the EMI filter size of non-isolated dc-dc converters, CM noise cancellation methods have been proposed, including the symmetry circuit, passive cancellation and CM voltage cancellation. In these methods, additional components or windings are required for reducing the CM noise. In this paper, a new CM noise cancellation method in non-isolated dc-dc converters is proposed by adopting a split-winding (SW) configuration. Compared to the existing CM noise cancellation methods which require additional components, the proposed method in the buck, boost and SEPIC converters working in voltage step-up mode has the identical volume as their conventional circuit configurations. The proposed method is verified for a buck converter by experiment.

ACS Style

Lihong Xie; Xibo Yuan. Non-isolated DC-DC Converters with Low Common-Mode Noise by Using Split-Winding Configuration. IEEE Transactions on Power Electronics 2021, PP, 1 -1.

AMA Style

Lihong Xie, Xibo Yuan. Non-isolated DC-DC Converters with Low Common-Mode Noise by Using Split-Winding Configuration. IEEE Transactions on Power Electronics. 2021; PP (99):1-1.

Chicago/Turabian Style

Lihong Xie; Xibo Yuan. 2021. "Non-isolated DC-DC Converters with Low Common-Mode Noise by Using Split-Winding Configuration." IEEE Transactions on Power Electronics PP, no. 99: 1-1.

Journal article
Published: 07 July 2021 in IEEE Open Journal of Power Electronics
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This paper aims to point out and demonstrate the opportunities enabled by wide-bandgap (WBG) devices for multilevel converters, contributing to the international technology roadmap for WBG power semiconductors (ITRW), which is the topic of this special issue. The emergence of silicon carbide (SiC) and gallium nitride (GaN) devices offers new opportunities pushing the boundaries of power converter performances. Featuring high single-device blocking voltage and ultra-low switching loss, WBG devices can enable multilevel converters with simplified structures and higher number of levels to be practically implemented in applications with various power levels. This paper highlights how the use of WBG devices can reduce the number of required devices in existing and new multilevel topologies, how the capacitor voltage balance can be achieved with the newly proposed redundant level modulation (RLM) enabled by the ultra-low switching loss of WBG devices and how the switching frequency and efficiency can be improved with WBG multilevel converters. A 1.2kV/100kW demonstrator implemented with a simplified four-level active neutral point clamped (ANPC) structure is studied to show the opportunities brought by WBG devices for multilevel converters. A detailed voltage balancing scheme based on the RLM and a power loss analysis are presented for this case study.

ACS Style

Xibo Yuan; Jun Wang; Ian David Laird; Wenzhi Zhou. Wide-Bandgap Device Enabled Multilevel Converters With Simplified Structures and Capacitor Voltage Balancing Capability. IEEE Open Journal of Power Electronics 2021, 2, 401 -410.

AMA Style

Xibo Yuan, Jun Wang, Ian David Laird, Wenzhi Zhou. Wide-Bandgap Device Enabled Multilevel Converters With Simplified Structures and Capacitor Voltage Balancing Capability. IEEE Open Journal of Power Electronics. 2021; 2 (99):401-410.

Chicago/Turabian Style

Xibo Yuan; Jun Wang; Ian David Laird; Wenzhi Zhou. 2021. "Wide-Bandgap Device Enabled Multilevel Converters With Simplified Structures and Capacitor Voltage Balancing Capability." IEEE Open Journal of Power Electronics 2, no. 99: 401-410.

Journal article
Published: 06 July 2021 in IEEE Transactions on Components, Packaging and Manufacturing Technology
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Fast and accurate thermal analysis is critical in designing power electronics converters through virtual prototyping to achieve high power density, efficiency, etc. Virtual prototyping can save the cost and time in comparison to hardware prototyping and experimental test and can lead to an overall optimized design. For removing the heat in power converters effectively, forced convection such as air cooling or liquid cooling is usually adopted. To estimate the temperature distribution and assist the layout optimization without building physical prototypes, fast and accurate thermal prediction is required, which is an essential area in virtual prototyping of power electronics. In this paper, a thermal-flow network (TFN) modeling method is proposed to solve the flow and temperature distribution in a power converter. The flow distribution is calculated by flow network consisting of flow resistances, flow branches and sources. The temperature distribution is then estimated by the thermal network, where the related boundary condition (heat transfer coefficient and local fluid temperature) is assigned using empirical equations. The fundamental and basic circuit elements for the TFN modeling method have been implemented in software, which helps to build the TFN modularly. The comparison between the proposed method, computational fluid dynamics (CFD) and experiment is provided to show the effectiveness of the TFN modeling method. The proposed modeling and analysis process can also be adapted for other forced cooling methods.

ACS Style

Lihong Xie; Xibo Yuan; Wenbo Wang. Thermal-Flow Network Modeling for Virtual Prototyping of Power Electronics. IEEE Transactions on Components, Packaging and Manufacturing Technology 2021, 11, 1282 -1291.

AMA Style

Lihong Xie, Xibo Yuan, Wenbo Wang. Thermal-Flow Network Modeling for Virtual Prototyping of Power Electronics. IEEE Transactions on Components, Packaging and Manufacturing Technology. 2021; 11 (8):1282-1291.

Chicago/Turabian Style

Lihong Xie; Xibo Yuan; Wenbo Wang. 2021. "Thermal-Flow Network Modeling for Virtual Prototyping of Power Electronics." IEEE Transactions on Components, Packaging and Manufacturing Technology 11, no. 8: 1282-1291.

Original research paper
Published: 22 June 2021 in IET Power Electronics
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For three-level inverters, hysteresis current control (HCC) has been widely used in applications such as active power filters due to its fast-dynamic response, and it does not need to control each frequency separately with multiple controllers, which makes it simpler. However, the large fluctuation range of switching frequency is a serious disadvantage of hysteresis current control. Especially, the switching frequency decreases significantly during grid voltage zero-crossing. This frequency fluctuation will cause low-frequency harmonics. The purpose of this paper is to propose a sampling compensation scheme, which can solve the problem of switching frequency fluctuation near the zero-crossing of grid voltage. Based on the variable hysteresis band strategy, the virtual sampling and switching time prediction algorithm is designed, which does not need to increase the sampling frequency or add additional controller. Therefore, nearly fixed switching frequency can be achieved while maintaining the control performance. Both simulation and experimental tests have verified the efficacy of the proposed scheme.

ACS Style

Haifeng Wang; Xinzhen Wu; Xiaoqin Zheng; Xibo Yuan. An improved hysteresis current control scheme during grid voltage zero‐crossing for grid‐connected three‐level inverters. IET Power Electronics 2021, 14, 1946 -1959.

AMA Style

Haifeng Wang, Xinzhen Wu, Xiaoqin Zheng, Xibo Yuan. An improved hysteresis current control scheme during grid voltage zero‐crossing for grid‐connected three‐level inverters. IET Power Electronics. 2021; 14 (11):1946-1959.

Chicago/Turabian Style

Haifeng Wang; Xinzhen Wu; Xiaoqin Zheng; Xibo Yuan. 2021. "An improved hysteresis current control scheme during grid voltage zero‐crossing for grid‐connected three‐level inverters." IET Power Electronics 14, no. 11: 1946-1959.

Journal article
Published: 16 June 2021 in IEEE Transactions on Industrial Electronics
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Finite control set model predictive control (FCS-MPC) faces clear challenges when the control plant is complicated such as a multi-phase electric machine. This paper for the first time investigates the FCS-MPC for a nine-phase open-end winding (OW) permanent magnet synchronous machine (PMSM). First, in order to solve the challenge of substantial iterations in the conventional FCS-MPC, the number of control sets is simplified by reconfiguring the high level in switching states. Then, to eliminate the zero-sequence current caused by the common dc bus, the zero common-mode voltage (CMV) vector is selected. Subsequently, duty ratio optimization is used to further reduce the available vectors. By the above measures, the number of iterations is reduced from 19,171 to 18. In order to suppress the harmonic current, the virtual voltage vectors (VVs) are designed. Each VV is synthesized by two zero CMV vectors, which can eliminate all the 3rd and 5th harmonics in the output voltage. In addition, to achieve symmetrical PWM pulse sequences, a general pulse generation method for OW drive systems is proposed. Finally, the control performance of different control sets and harmonic weighting factors are evaluated and compared, and the experimental results have verified the effectiveness of the proposed methods.

ACS Style

Haifeng Wang; Xinzhen Wu; Xiaoqin Zheng; Xibo Yuan. Virtual Voltage Vector Based Model Predictive Control for a Nine-Phase Open-End Winding PMSM With a Common DC Bus. IEEE Transactions on Industrial Electronics 2021, PP, 1 -1.

AMA Style

Haifeng Wang, Xinzhen Wu, Xiaoqin Zheng, Xibo Yuan. Virtual Voltage Vector Based Model Predictive Control for a Nine-Phase Open-End Winding PMSM With a Common DC Bus. IEEE Transactions on Industrial Electronics. 2021; PP (99):1-1.

Chicago/Turabian Style

Haifeng Wang; Xinzhen Wu; Xiaoqin Zheng; Xibo Yuan. 2021. "Virtual Voltage Vector Based Model Predictive Control for a Nine-Phase Open-End Winding PMSM With a Common DC Bus." IEEE Transactions on Industrial Electronics PP, no. 99: 1-1.

Journal article
Published: 08 June 2021 in IEEE Transactions on Industry Applications
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There is a continuous demand for high-power, high-efficiency and high-density converters in various existing and emerging applications such as large motor drives, electric vehicles, more electric aircraft and utility applications. Compared with conventional silicon (Si) IGBTs, silicon carbide (SiC) MOSFETs can have lower switching loss and higher frequency operation capabilities, which enables higher efficiency and higher power density at the converter level. Meanwhile, to achieve a high power rating such as 500kW, how to extend the current capabilities of existing SiC power modules, the choice of parallel schemes, the selection of passive components, cooling and mechanical structure design pose clear challenges in maximizing the system power density and efficiency. This paper presents a comprehensive design of the world-first air-cooled 500kW SiC DC/AC three-phase converter, which achieves a record-high power density of 1.246MW/m3 (1.246kW/L) and an efficiency over 98.5%. The converter has been tested in experiment to the full power rating, which provides benchmark results for high power SiC converters and their applications.

ACS Style

Y. Li; Yonglei Zhang; Xibo Yuan; Lei Zhang; Zhenhao Song; Ming Wu; Fei Ye; Zhe Li; Yipu Xu; Zijian Wang. 500 kW Forced Air-Cooled Silicon Carbide (SiC) Three-Phase DC/AC Converter With a Power Density of 1.246 MW/m3 and Efficiency >98.5%. IEEE Transactions on Industry Applications 2021, 57, 5013 -5027.

AMA Style

Y. Li, Yonglei Zhang, Xibo Yuan, Lei Zhang, Zhenhao Song, Ming Wu, Fei Ye, Zhe Li, Yipu Xu, Zijian Wang. 500 kW Forced Air-Cooled Silicon Carbide (SiC) Three-Phase DC/AC Converter With a Power Density of 1.246 MW/m3 and Efficiency >98.5%. IEEE Transactions on Industry Applications. 2021; 57 (5):5013-5027.

Chicago/Turabian Style

Y. Li; Yonglei Zhang; Xibo Yuan; Lei Zhang; Zhenhao Song; Ming Wu; Fei Ye; Zhe Li; Yipu Xu; Zijian Wang. 2021. "500 kW Forced Air-Cooled Silicon Carbide (SiC) Three-Phase DC/AC Converter With a Power Density of 1.246 MW/m3 and Efficiency >98.5%." IEEE Transactions on Industry Applications 57, no. 5: 5013-5027.

Journal article
Published: 04 June 2021 in IEEE Access
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The emergence of fast-switching wide-bandgap (GaN, SiC) power electronics devices has enabled motor drive systems to achieve high efficiency, power density, control bandwidth and high-level of integration. However, the fast-switching speed and high switching frequency result in an increased level of motor overvoltage at both motor terminals and stator neutral. This overvoltage increases the stress across the motor winding insulation and bearings. This paper investigates three types of motor overvoltages, i.e., differential mode (DM) (phase-to-phase) motor terminal overvoltage, common mode (CM) (phase-to-ground) motor terminal overvoltage and CM stator neutral overvoltage (motor neutral to ground). Both the high switching speed (high dv/dt) effect and the high switching frequency effect on the motor overvoltage are investigated in this paper, where the high switching frequency effect has not been fully addressed in existing literature. Significant overvoltage is observed when the switching frequency or its multiples coincide with the cable or motor anti-resonant frequency. The anti-resonant behavior in the cable and motor impedance has been used to identify the overvoltage oscillation frequency and to explain the overvoltage observations for the three types of motor overvoltages. The analysis has been tested using a 7.5kW motor setup with and without a four-core cable, driven by a SiC or a GaN three-phase inverter with a switching frequency up to 250kHz and switching speed up to 40kV/μ s. In addition, the motor bearing current, which is a main cause of bearing degradation, has also been tested and the increase of bearing current is observed due to the high frequency effect.

ACS Style

Yipu Xu; Xibo Yuan; Fei Ye; Zihao Wang; Yonglei Zhang; Mohamed Diab; Wenzhi Zhou. Impact of High Switching Speed and High Switching Frequency of Wide-Bandgap Motor Drives on Electric Machines. IEEE Access 2021, 9, 82866 -82880.

AMA Style

Yipu Xu, Xibo Yuan, Fei Ye, Zihao Wang, Yonglei Zhang, Mohamed Diab, Wenzhi Zhou. Impact of High Switching Speed and High Switching Frequency of Wide-Bandgap Motor Drives on Electric Machines. IEEE Access. 2021; 9 (99):82866-82880.

Chicago/Turabian Style

Yipu Xu; Xibo Yuan; Fei Ye; Zihao Wang; Yonglei Zhang; Mohamed Diab; Wenzhi Zhou. 2021. "Impact of High Switching Speed and High Switching Frequency of Wide-Bandgap Motor Drives on Electric Machines." IEEE Access 9, no. 99: 82866-82880.

Journal article
Published: 27 April 2021 in IEEE Open Journal of the Industrial Electronics Society
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Nowadays accurate estimation of the magnetic component losses becomes increasingly important in the design stage of power converters, especially in the virtual prototyping process, considering their large volume and weight share in a typical power electronics system. As a main challenge in modelling a magnetic component, the core loss is commonly measured using the two winding B-H loop measurement method. However, this method is susceptible to phase discrepancy error, especially for low-permeability, low-loss cores. This paper, therefore, proposes a new offline method to compensate the phase shift error in high-frequency core loss measurement under rectangular voltage excitation. In the post-processing of measured waveforms, the phase discrepancy is compensated through shifting the measured current horizontally to align with the reference phase angle found from an offline impedance frequency sweep using an impedance analyzer. Hence, measurements can be done without considering deskew at the time of measuring. The proposed phase correction approach can be quickly implemented to measure the error-free core loss of magnetic components exposed in rectangular excitation voltages. Also, this method is more accurate in contrast to the previous calibration methods with a fixed frequency, because it considers the frequency response across the spectrum.

ACS Style

Navid Rasekh; Jun Wang; Xibo Yuan. A New Method for Offline Compensation of Phase Discrepancy in Measuring the Core Loss With Rectangular Voltage. IEEE Open Journal of the Industrial Electronics Society 2021, 2, 302 -314.

AMA Style

Navid Rasekh, Jun Wang, Xibo Yuan. A New Method for Offline Compensation of Phase Discrepancy in Measuring the Core Loss With Rectangular Voltage. IEEE Open Journal of the Industrial Electronics Society. 2021; 2 (99):302-314.

Chicago/Turabian Style

Navid Rasekh; Jun Wang; Xibo Yuan. 2021. "A New Method for Offline Compensation of Phase Discrepancy in Measuring the Core Loss With Rectangular Voltage." IEEE Open Journal of the Industrial Electronics Society 2, no. 99: 302-314.

Original research paper
Published: 22 March 2021 in IET Renewable Power Generation
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Voltage‐controlled voltage‐source inverters (VVSIs) have been widely used in microgrids. Typically, LC filters are adopted by the VVSIs to improve the quality of the output voltage. Resonances of the LC filters that may cause oscillations to the VVSIs can be damped by well‐designed voltage controllers. However, the virtual inductance (VI) that is widely applied to improve power sharing between VVSIs will reduce the stability margin of the voltage control loop and introduce new oscillations on the LC filters even if the well‐designed voltage controllers have been used, which has not been reported in the literature. Furthermore, since the VI will introduce a cross‐coupling into the system, the conventional methods for analyzing the resonances of the LC‐filtered VVSIs cannot be used for analyzing the oscillations caused by the VI. Therefore, the stability of the LC‐filtered VVSI with the VI is investigated based on a new model proposed in this paper. Besides, to enhance the stability of the VVSI, the application of a low‐pass filter or a band‐pass filter in the VI is studied. Moreover, when connecting the VVSIs, the effects of the line impedance on the stability of the VVSIs while using the VI are investigated. Finally, simulation and experimental results have been provided, which verifies the correctness of the analysis in this paper.

ACS Style

Kai Wang; Xibo Yuan; Yonglei Zhang; Xiaoqiang Li; Yiwen Geng; Xiaojie Wu. Analysis of virtual inductances on the stability of the voltage control loops for LC‐filtered voltage‐controlled voltage‐source inverters in microgrids. IET Renewable Power Generation 2021, 1 .

AMA Style

Kai Wang, Xibo Yuan, Yonglei Zhang, Xiaoqiang Li, Yiwen Geng, Xiaojie Wu. Analysis of virtual inductances on the stability of the voltage control loops for LC‐filtered voltage‐controlled voltage‐source inverters in microgrids. IET Renewable Power Generation. 2021; ():1.

Chicago/Turabian Style

Kai Wang; Xibo Yuan; Yonglei Zhang; Xiaoqiang Li; Yiwen Geng; Xiaojie Wu. 2021. "Analysis of virtual inductances on the stability of the voltage control loops for LC‐filtered voltage‐controlled voltage‐source inverters in microgrids." IET Renewable Power Generation , no. : 1.

Journal article
Published: 09 March 2021 in IEEE Access
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Compared with silicon (Si) IGBTs, silicon carbide (SiC) MOSFETs have much faster switching speeds and high switching frequency operation capability, enabling compact and high-efficiency motor drive systems. However, the increased switching speed and frequency also cause increased-level of common-mode (CM) voltage with higher slew rates ( dv / dt ). The CM voltage leads to machine leakage currents as well as bearing currents such as electric discharge machining (EDM) type current and capacitive-type ( dv / dt ) current. These bearing currents can cause degradation or failure of motor bearings. In order to investigate the impact of SiC motor drives on the motor bearing currents, in this paper, the mechanism and modelling of bearing currents are analyzed first. Then, a direct measurement method is used to assess the bearing currents in the induction motor driven by the SiC converter. In the experiment, the number of EDM current events is counted and the amplitude of the capacitive-type of current is also examined under various switching speeds and frequencies of SiC devices. Furthermore, the bearing currents are also extensively tested under various bearing temperatures, motor speeds and dc-link voltages. The correlations between the bearing currents and various factors have been revealed in this paper.

ACS Style

Yipu Xu; Yan Liang; Xibo Yuan; Xiaojie Wu; Yan Li. Experimental Assessment of High Frequency Bearing Currents in an Induction Motor Driven by a SiC Inverter. IEEE Access 2021, 9, 40540 -40549.

AMA Style

Yipu Xu, Yan Liang, Xibo Yuan, Xiaojie Wu, Yan Li. Experimental Assessment of High Frequency Bearing Currents in an Induction Motor Driven by a SiC Inverter. IEEE Access. 2021; 9 ():40540-40549.

Chicago/Turabian Style

Yipu Xu; Yan Liang; Xibo Yuan; Xiaojie Wu; Yan Li. 2021. "Experimental Assessment of High Frequency Bearing Currents in an Induction Motor Driven by a SiC Inverter." IEEE Access 9, no. : 40540-40549.

Journal article
Published: 11 February 2021 in IEEE Transactions on Power Electronics
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It is well known that PWM inverters generate common-mode (CM) voltages, which may cause the CM electromagnetic interference (EMI) and leakage current in the applications such as photovoltaic (PV) or motor drive systems. The CM noise issue becomes more severe with the application of silicon-carbide (SiC) devices, which has higher dv/dt than silicon (Si) devices. In this paper, a passive cancellation method is proposed by inserting two CM transformers (CMT) into the input and output side of the inverter, respectively. The selection of the turns ratio for two CMTs is analyzed and revealed to achieve the best CM noise cancellation, and the influence of the parasitics in the CMT is investigated as they limit the bandwidth for CM noise cancellation. Compared to the passive filter, floating filter and the active cancellation method, the proposed method could reduce the CM noise at both sides simultaneously regardless of the CM impedance of the source or the load. A single-phase inverter is built, and the proposed method achieves 40 dB reduction at both sides, which verifies the effectiveness of the proposed method.

ACS Style

Lihong Xie; Xibo Yuan. Common-Mode Current Reduction at DC and AC Sides in Inverter Systems by Passive Cancellation. IEEE Transactions on Power Electronics 2021, 36, 9069 -9079.

AMA Style

Lihong Xie, Xibo Yuan. Common-Mode Current Reduction at DC and AC Sides in Inverter Systems by Passive Cancellation. IEEE Transactions on Power Electronics. 2021; 36 (8):9069-9079.

Chicago/Turabian Style

Lihong Xie; Xibo Yuan. 2021. "Common-Mode Current Reduction at DC and AC Sides in Inverter Systems by Passive Cancellation." IEEE Transactions on Power Electronics 36, no. 8: 9069-9079.

Journal article
Published: 11 February 2021 in IEEE Journal of Emerging and Selected Topics in Power Electronics
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The grid-connected inverters (GCIs) that use droop control can avoid instability issues caused by the phase lock loops (PLLs) when connected to weak grids. Thus, the droop-controlled GCIs (DGCIs) have attracted more and more attentions. However, one of the limitations of the droop control is that its performance is highly influenced by the line impedances. Virtual inductances (VIs) can be used to overcome this limitation. However, if LCL filters are used by the GCIs to attenuate current harmonics, the interference between the VIs and the LCL filters will cause a new type of system oscillations. In this paper, the effects of the VI on the stability of the LCL filter have been explored when the grid-side current (GC) or the inverter-side current (IC) of the LCL filter is used as the feedback for the VI. It has been revealed that the stabilities of the system when using these two currents by the VI are different. The feasible ranges of the parameter values of the VI have been derived, with which the VI can be used without affecting the stability of the DGCIs. Simulation and experimental results have been provided, which verify the correctness of the analysis in this paper.

ACS Style

Kai Wang; Xibo Yuan. Stability Analysis of the Virtual Inductance for LCL Filtered Droop-controlled Grid-connected Inverters. IEEE Journal of Emerging and Selected Topics in Power Electronics 2021, PP, 1 -1.

AMA Style

Kai Wang, Xibo Yuan. Stability Analysis of the Virtual Inductance for LCL Filtered Droop-controlled Grid-connected Inverters. IEEE Journal of Emerging and Selected Topics in Power Electronics. 2021; PP (99):1-1.

Chicago/Turabian Style

Kai Wang; Xibo Yuan. 2021. "Stability Analysis of the Virtual Inductance for LCL Filtered Droop-controlled Grid-connected Inverters." IEEE Journal of Emerging and Selected Topics in Power Electronics PP, no. 99: 1-1.

Journal article
Published: 04 February 2021 in IEEE Transactions on Power Electronics
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There are various ways to derive multilevel converter topologies as pointed out by the author's previous work. This letter proposes an ultimate voltage-source generalized multilevel converter topology which unifies several generalized multilevel topologies and also incorporates bi-directional switches. Most of the known multilevel topologies can be derived from this topology and new topologies can also be derived from it. Examples have been given in this letter. This generalized topology helps to understand complicated converter topologies, especially those with bi-directional switches and it can also be used to determine the voltage requirements/ratings of the devices in various topologies. This letter has summarized the rules to derive topologies from this generalized topology and provides experimental results for one of the derived multi-level converter examples. It is expected new topologies can be inspired or derived from this work and used for existing and emerging applications, with this letter as a milestone in the research of multilevel converter topologies.

ACS Style

Xibo Yuan. Ultimate Generalized Multilevel Converter Topology. IEEE Transactions on Power Electronics 2021, 36, 8634 -8639.

AMA Style

Xibo Yuan. Ultimate Generalized Multilevel Converter Topology. IEEE Transactions on Power Electronics. 2021; 36 (8):8634-8639.

Chicago/Turabian Style

Xibo Yuan. 2021. "Ultimate Generalized Multilevel Converter Topology." IEEE Transactions on Power Electronics 36, no. 8: 8634-8639.

Journal article
Published: 01 January 2021 in IEEE Transactions on Industry Applications
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Along the advances of wide-bandgap power devices, the pulse width modulation (PWM) converters are developing towards higher switching frequencies in recent years. Accurate estimation of the high-frequency power losses of magnetic components, the core loss in particular, has been a challenge for PWM converters. While the conventional approaches based on Steinmetz Equation lose the accuracy in PWM excitations, the ‘loss map’ approach has been proposed recently as a practical method to accurately estimate the inductor core loss. To calculate the core loss, the inputs of the loss map need to be retrieved from the steady-state inductor voltage/current waveforms. As a supplement to the loss map approach, this work proposes an analytical method to rapidly generate the inputs (inductor operating space) for the loss map to replace the efforts in building simulation models and experimental rigs. The proposed approach relies on the operation and modulation principles of PWM converters and enables computerized calculation of the operating space and the inductor core loss. The proposed approach is developed for both 2-level and 3-level converters and validated by experiments. The results reveal that a 3-level converter running the same inductor generates less than half the core loss compared to a 2-level converter, when the maximum current ripple kept equivalent. The proposed approach is based on the operation principles of the converter topology and therefore can be applied generally regardless of the core material or the design of the inductor, as long as the loss map of the inductor is pre-produced.

ACS Style

Jun Wang; Navid Rasekh; Xibo Yuan; Kfir J. Dagan. An Analytical Method for Fast Calculation of Inductor Operating Space for High-Frequency Core Loss Estimation in Two-Level and Three-Level PWM Converters. IEEE Transactions on Industry Applications 2021, 57, 650 -663.

AMA Style

Jun Wang, Navid Rasekh, Xibo Yuan, Kfir J. Dagan. An Analytical Method for Fast Calculation of Inductor Operating Space for High-Frequency Core Loss Estimation in Two-Level and Three-Level PWM Converters. IEEE Transactions on Industry Applications. 2021; 57 (1):650-663.

Chicago/Turabian Style

Jun Wang; Navid Rasekh; Xibo Yuan; Kfir J. Dagan. 2021. "An Analytical Method for Fast Calculation of Inductor Operating Space for High-Frequency Core Loss Estimation in Two-Level and Three-Level PWM Converters." IEEE Transactions on Industry Applications 57, no. 1: 650-663.

Journal article
Published: 14 December 2020 in IEEE Open Journal of the Industrial Electronics Society
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This paper for the first time comprehensively presents a multilevel space vector pulse width modulation (SVPWM) method based on the imaginary coordinate system. This method is probably one of the most efficient methods in fast multilevel SVPWMs. It avoids trigonometric operation, look-up tables and only requires simple logic judgement and arithmetic calculation. A distinct advantage of this method over other coordinate-transformation-based methods is that it does not need to transform from the imaginary coordinate system back to the a-b-c (or $\alpha-\beta$ ) coordinate in order to select the redundant vectors using look-up tables. The redundant vectors or zero-sequence components are directly worked out in the proposed method, e.g. for balancing dc-link capacitor voltages, which avoids identifying the starting vector, vector rotation direction (clockwise or anti-clockwise), vector sequence, etc. as used in conventional methods. This paper entails each step to implement this SVPWM method, which can be replicated for multilevel converters with any number of voltage levels. The presented method has been used and validated by various converters, including a three-level and a five-level neutral-point-clamped converter. The archive value of this paper is that it demonstrates a milestone of fast multilevel SVPWM based on coordinate transformation.

ACS Style

Xibo Yuan; Yue Gao; Yongdong Li. A Fast Multilevel SVPWM Method Based on the Imaginary Coordinate With Direct Control of Redundant Vectors or Zero Sequence Components. IEEE Open Journal of the Industrial Electronics Society 2020, 1, 355 -366.

AMA Style

Xibo Yuan, Yue Gao, Yongdong Li. A Fast Multilevel SVPWM Method Based on the Imaginary Coordinate With Direct Control of Redundant Vectors or Zero Sequence Components. IEEE Open Journal of the Industrial Electronics Society. 2020; 1 (99):355-366.

Chicago/Turabian Style

Xibo Yuan; Yue Gao; Yongdong Li. 2020. "A Fast Multilevel SVPWM Method Based on the Imaginary Coordinate With Direct Control of Redundant Vectors or Zero Sequence Components." IEEE Open Journal of the Industrial Electronics Society 1, no. 99: 355-366.

Journal article
Published: 09 December 2020 in IEEE Transactions on Power Electronics
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No dead-time is contained in the existing dead-time elimination PWM for three-phase three-level T-type converters, where complementary drive pulses are allocated alternatively according to polarities of output currents. Consequently, the dead-time effect can be inherently avoided. However, the dependency on current polarities seriously limits its wide-spread application. Wrong current polarities, e.g., in a dynamic process, will lead to the output-voltage disappearance, thus aggravating the possible “algebraic loop” issue and impairing the stability of the system. In this paper, in order to reduce the dependency on current polarities while retaining the characteristic of dead-time-effect elimination, a double-modulation-wave PWM is proposed by modifying the dead-time elimination PWM. Two modulation waves with a magnitude difference are adopted for generating underlap periods between complementary drive pulses, which can avoid the shoot-through failure and no dead-time effect will be generated. And to further simplify the implementation process, the two modulation waves are decomposed by introducing a magnitude-adjustment factor related to the current polarity. Whereas it is also due to the employment of two modulation waves, extra issues of overmodulation, single drive pulses, and a shorter underlap period may occur, which are analyzed in detail and the negative effect can be avoided.

ACS Style

Qingzeng Yan; Langtao Xiao; Xibo Yuan; Xincheng Zhang; Cheng Yuan; Rende Zhao; Hailiang Xu. A Double-Modulation-Wave PWM With Reduced Dependency on Current Polarities for Dead-Time-Effect Elimination in Three-Level T-Type Converters. IEEE Transactions on Power Electronics 2020, 36, 8413 -8427.

AMA Style

Qingzeng Yan, Langtao Xiao, Xibo Yuan, Xincheng Zhang, Cheng Yuan, Rende Zhao, Hailiang Xu. A Double-Modulation-Wave PWM With Reduced Dependency on Current Polarities for Dead-Time-Effect Elimination in Three-Level T-Type Converters. IEEE Transactions on Power Electronics. 2020; 36 (7):8413-8427.

Chicago/Turabian Style

Qingzeng Yan; Langtao Xiao; Xibo Yuan; Xincheng Zhang; Cheng Yuan; Rende Zhao; Hailiang Xu. 2020. "A Double-Modulation-Wave PWM With Reduced Dependency on Current Polarities for Dead-Time-Effect Elimination in Three-Level T-Type Converters." IEEE Transactions on Power Electronics 36, no. 7: 8413-8427.

Journal article
Published: 01 December 2020 in IEEE Transactions on Power Electronics
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The emergence of fast switching wide-bandgap (WBG) power devices offers clear potential to implement higher power-density and more efficient motor drives. However, the high voltage slew rate (dv/dt) of switching transients brought significant challenges that can hamper the wide adoption of WBG devices in motor drive applications. Specifically, the aggravated motor overvoltage oscillation, due to reflected voltage phenomenon under high dv/dt, is one of the most considerable challenges that degrade the motor lifetime. With filter networks acting as the mainstream mitigation method, the advantages of WBG-based motor drives are compromised due to additional size and power loss of the filters. This letter proposes a novel quasi-three-level PWM scheme as a software solution to eliminate motor overvoltage oscillations in cable-fed drives. The proposed scheme adopts a brief zero-voltage state, with a predetermined time, in the midway of each pole-to-pole voltage transition. This allows the voltage reflections along the cable to significantly discontinue after two propagation cycles, securing the motor operation at prescribed voltage levels. The proposed scheme is applicable to two-level voltage-source inverters (VSIs). In this letter, the scheme is presented on a single-phase two-level VSI motor drive, supported with theoretical and experimental proof of concept.

ACS Style

Mohamed Said Diab; Xibo Yuan. A Quasi-Three-Level PWM Scheme to Combat Motor Overvoltage in SiC-Based Single-Phase Drives. IEEE Transactions on Power Electronics 2020, 35, 12639 -12645.

AMA Style

Mohamed Said Diab, Xibo Yuan. A Quasi-Three-Level PWM Scheme to Combat Motor Overvoltage in SiC-Based Single-Phase Drives. IEEE Transactions on Power Electronics. 2020; 35 (12):12639-12645.

Chicago/Turabian Style

Mohamed Said Diab; Xibo Yuan. 2020. "A Quasi-Three-Level PWM Scheme to Combat Motor Overvoltage in SiC-Based Single-Phase Drives." IEEE Transactions on Power Electronics 35, no. 12: 12639-12645.

Journal article
Published: 24 November 2020 in IEEE Transactions on Industrial Electronics
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Four-level neutral-point-clamped (NPC) multilevel converter topologies have been proposed and actively studied for low/medium voltage applications. As an inherent issue with this type of topologies, the voltage balancing of dc-link capacitors is challenging, especially when it operates as a single-end inverter/rectifier with high power factors and high modulation indexes. This paper proposes a closed-loop voltage balancing control that is effective and simple to implement with regular level-shifter carriers for a four-level converter, e.g. a π-type converter. This approach is based on the Redundant Level Modulation (RLM), which utilizes additional voltage levels in one switching window to gain extra controllability of the capacitor voltages without affecting the average output voltage. An algorithm based on analytical expressions and logical operations is developed to utilize RLM to achieve a dynamic closed-loop voltage balancing. The proposed method is effective over the full modulation index range (M = 0 ~ 1.15) and high power factors. The proposed algorithm is validated and evaluated in simulations and experiments.

ACS Style

Jun Wang; Xibo Yuan; Bosen Jin. Carrier-based Closed-loop DC-link Voltage Balancing Algorithm for Four Level NPC Converters based on Redundant Level Modulation. IEEE Transactions on Industrial Electronics 2020, PP, 1 -1.

AMA Style

Jun Wang, Xibo Yuan, Bosen Jin. Carrier-based Closed-loop DC-link Voltage Balancing Algorithm for Four Level NPC Converters based on Redundant Level Modulation. IEEE Transactions on Industrial Electronics. 2020; PP (99):1-1.

Chicago/Turabian Style

Jun Wang; Xibo Yuan; Bosen Jin. 2020. "Carrier-based Closed-loop DC-link Voltage Balancing Algorithm for Four Level NPC Converters based on Redundant Level Modulation." IEEE Transactions on Industrial Electronics PP, no. 99: 1-1.

Journal article
Published: 01 November 2020 in Microelectronics Reliability
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This paper investigates the crosstalk-induced spontaneous switchings as continuous cycles of turn-on and turn-off transients as a key reliability criterion in SiC and GaN cascode power devices. The paper presents a wide range of measurements to describe the severity of unwanted switching cycles in presence of a few diodes with high turn-off dI/dt which results in a negative gate voltage induced by the source inductance. Modelling is performed which confirms the theory described to explain the root cause of the continued oscillatory transients and comparisons are made with standalone SiC power MOSFETs.

ACS Style

Yasin Gunaydin; Saeed Jahdi; Olayiwola Alatise; Jose Angel Ortiz-Gonzalez; Avinash Aithal; Xibo Yuan; Phil Mellor. Analysis of cyclic spontaneous switchings in GaN & SiC cascodes by snappy turn-off currents. Microelectronics Reliability 2020, 114, 113752 .

AMA Style

Yasin Gunaydin, Saeed Jahdi, Olayiwola Alatise, Jose Angel Ortiz-Gonzalez, Avinash Aithal, Xibo Yuan, Phil Mellor. Analysis of cyclic spontaneous switchings in GaN & SiC cascodes by snappy turn-off currents. Microelectronics Reliability. 2020; 114 ():113752.

Chicago/Turabian Style

Yasin Gunaydin; Saeed Jahdi; Olayiwola Alatise; Jose Angel Ortiz-Gonzalez; Avinash Aithal; Xibo Yuan; Phil Mellor. 2020. "Analysis of cyclic spontaneous switchings in GaN & SiC cascodes by snappy turn-off currents." Microelectronics Reliability 114, no. : 113752.

Journal article
Published: 29 September 2020 in IEEE Transactions on Power Electronics
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Given the high complexity of the conventional three-level space-vector pulse-width-modulation (3L SVPWM), simplified SVPWM algorithms are usually adopted instead. However, existing simplifications for 3L SVPWM still have a large computation burden, which limits its applications, e.g., in high-switching-frequency silicon-carbide (SiC) converters with a short computation period. In this letter, based on a typical simplified algorithm known as the center-aligned 3L SVPWM, a simplified analytical algorithm in abc coordinate is proposed. The reference-voltage-vector adjustment and the calculation of modulation waves are unified based on the center-aligned SVPWM. The modulation waves can be analytically derived by only 8 simple equations, without sector determination, calculation and assignment of dwell times. Consequently, the complexity of implementing the 3L SVPWM is significantly reduced.

ACS Style

Qingzeng Yan; Zanrong Zhou; Mingbo Wu; Xibo Yuan; Rende Zhao; Hailiang Xu. A Simplified Analytical Algorithm in abc Coordinate for the Three-Level SVPWM. IEEE Transactions on Power Electronics 2020, 36, 3622 -3627.

AMA Style

Qingzeng Yan, Zanrong Zhou, Mingbo Wu, Xibo Yuan, Rende Zhao, Hailiang Xu. A Simplified Analytical Algorithm in abc Coordinate for the Three-Level SVPWM. IEEE Transactions on Power Electronics. 2020; 36 (4):3622-3627.

Chicago/Turabian Style

Qingzeng Yan; Zanrong Zhou; Mingbo Wu; Xibo Yuan; Rende Zhao; Hailiang Xu. 2020. "A Simplified Analytical Algorithm in abc Coordinate for the Three-Level SVPWM." IEEE Transactions on Power Electronics 36, no. 4: 3622-3627.