The pulse carries important physiological and pathological information about the human body. The piezoresistive sensor used to capture vascular pulsation information has transitioned from a single-point to a sensor array. However, the interference signal between channels has become a key bottleneck restricting the development of the sensor array pulse diagnosis equipment. The sensor in contact with vascular pulsation obtains the pulse signal. When some sensors are displaced due to vascular pulsation, other sensors will be driven to move, which will produce interference signals. Signal interference is a common problem for sensor arrays, but few people have analyzed this problem from the perspective of the algorithm. In this paper, an interference signal recognition algorithm of the sensor array based on a convolutional neural network (CNN) is proposed. Firstly, a simple mechanical structure model was established to analyze the generation mechanism of interference signals in one MEMS sensor array acquisition system. Then, a CNN model with fewer parameters was designed for identifying interference signals. Finally, the CNN model was implemented on a field-programmable gate array (FPGA). The results show that the CNN algorithm could identify interference signals well, and the accuracy of the algorithm was 99.3%. The power consumption of the CNN accelerator was 0.673 W at a working frequency of 100 MHz. The interference signal identification algorithm is proposed to ensure the accurate analysis of array signals. FPGA implementation lays the foundation for the miniaturization and portability of the equipment.

Analog front-end (AFE) circuits play an important role in the acquisition of physiological signals with low-level amplitudes (from tens of μV to tens of mV) and broadband low-frequency ranges (from sub-Hz to several hundred Hz). Possessing a high input impedance, an instrumentation amplifier (IA) accurately amplifies signals with low amplitude and low frequency, making it suitable for AFE circuits. This work demonstrates a capacitively coupled IA whose feedback resistance is realized by the proposed hybrid resistor, consisting of a switched-capacitor low-pass filter, a switched-capacitor resistor, and a continuous-time low-pass filter. The capacitively coupled IA achieves tera-ohm (TΩ) resistance and is insensitive to process, voltage, and temperature (PVT) variations. The simulation results show that the proposed IA illustrates a high-pass corner of 73.9 mHz, and the change of its high-pass corner with temperature is 0.05 mHz/°C. With the variation in the PVT corners, the difference between the maximum and minimum values of the high-pass corner of the proposed capacitively coupled IA is only 0.06 Hz. The design was implemented in a 130 nm standard CMOS process. The AFE with the proposed capacitively coupled IA achieves a 53.9 dB signal-to-noise and distortion ratio (SNDR) and 69.5 dB total harmonic distortion (THD).