The statistical behavior of silicon-based single-photon-avalanche-diodes (SPADs) is investigated by using self-consistent 3-D Monte Carlo simulations. The coupling of Poisson and Boltzmann transport equations allows us to go beyond the analysis of avalanche breakdown and its timing and to extend the investigation to the quenching of the photodetector circuit. We find out that the quenching of SPADs is probabilistic and strongly depends on the surrounding circuit, in particular on the so-called quenching resistance. Independently of the SPAD deadtime, it appears that the extinction time needed to suppress any avalanche event may vary over a very large range.

This article proposes a generic and complete electro-thermal 4H-SiC physical Mosfet model. Static and transient in hard short-circuit operation behaviors are successfully performed using 2D Comsol™ software. Influence of fixed charges and traps at the 4H-SiC/SiO2 interface has been highlighted, both for static and transient. An additional mobility coefficient through Arora's mobility model was then suggested to fully fit the transient model in hard short-circuit operation.

The integration of Single-Photon Avalanche Diodes (SPADs) in CMOS Fully Depleted Silicon-On-Insulator (FD-SOI) technology under a buried oxide (BOX) layer and a silicon film containing transistors makes it possible to realize a 3D SPAD at the chip level. In our study, a nanostructurated layer created by an optimized arrangement of Shallow Trench Isolation (STI) above the photosensitive zone generates constructive interferences and consequently an increase in the light sensitivity in the frontside illumination. A simulation methodology is presented that couples electrical and optical data in order to optimize the STI trenches (size and period) and to estimate the Photon Detection Probability (PDP) gain. Then, a test chip was designed, manufactured, and characterized, demonstrating the PDP improvement due to the STI nanostructuring while maintaining a comparable Dark Count Rate (DCR).