Electrical distribution systems comprising different power sources and loads, such as electric vehicles, aircraft electrical distribution systems and residential microgrids, need for new power conversion architectures. Multi-port converters are an alternative to conventional multi-converter systems. This work studies a modular multi-active bridge (MMAB) converter, which is a multi-port converter based on the connection of active bridges and independent transformers. The converter is bidirectional, fully modular and scalable. It allows the connection of multiple power sources and loads that may change its power flow direction, allowing hot connection and disconnection of modules. The control of the power flow in each port depends on the relative phase shift among the control pulses of the others active bridges. An iterative algorithm is developed and implemented in a digital device to control the converter in real time. Besides a theoretical analysis, the main characteristics of the converter have been validated in a lab prototype with five modules. The experimental results validate the theoretical predictions. Power distribution among the modules has been kept under 9% of error with respect to the desired value, considering an open-loop control.

Digital controllers of power converters are more and more implemented in FPGAs due to the increasing complexity of current control algorithms, higher switching frequencies, and concurrence requirements. System behavior depends not only on the control algorithm but also on the implementation issues. Thus, closed-loop controller evaluation at early design stages is a main concern. In this paper, a new hardware-in-the-loop method is proposed. It profits from FPGAs and their design tools in order to validate the closed-loop power converter before prototyping the power stage. The proposed solution presents a general architecture that does not depend on specific vendors or CAD tools, but it uses those utilized for the final implementation of the controller. A case study is presented with a given implementation of the proposed solution. Comparisons with existing alternatives show the advantages of our approach.

The use of very high-resolution digital pulse width modulators (DPWMs) for high frequency dc-dc converters has been steadily increasing in recent years. However, the resolution of the DPWM formed by counters and comparators is limited when the switching frequency rise above MHz range. Given this limitation, new strategies for DPWM architectures are being designed to increase the resolution of the signals. This article proposes two new DPWMs architectures with the aim of increasing the resolution of trigger signals using field programmable gate arrays (FPGAs). The first proposed architecture is a hybrid DPWM, which integrates a clock manager and a delay line. For this architecture, the delay line is configured using FPGA intellectual properties (IP) blocks. This delay stage allows a fine resolution in the picosecond scale. In addition, an alternative solution has been implemented to generate two signals, the main signal and its complementary one, including high resolution for the dead time, which is also configurable. Both architectures have been tested through static and dynamic tests on two FPGAs of different costs, an Artix-7 (low-cost) and a Kintex-UltraScale 7 (high-cost) by Xilinx.

Capacitive power transfer (CPT) is gaining interest in the last years in the field of wireless power transfer for different applications, like vehicle charging or portable equipment battery charging. CPT exhibits better tolerance to misalignment and requires simpler hardware design than Inductive Power Transfer (IPT) in some cases. In this paper, a Wireless Capacitive Power Transfer Converter is studied and implemented, which gives a very high efficiency in the inverter and the resonant tank and demonstrates the feasibility of this technology.

Integrated Magnetic Components (IMCs) are used to save volume and increase the efficiency of many DC power converter topologies. However, their design is not a straightforward procedure, and it is possible to find different modeling strategies in the literature. Using one or another modeling approximation significantly impacts the analytical results' accuracy and may lead to erroneous solutions and to the need for a time-consuming redesigning process. In this study, an IMC with an EE-type structure and three air gaps, named E3E, is described and modeled under different modeling alternatives with an increasing degree of complexity. Additionally, a new expression to analytically model the window reluctance, key for coupling coefficient estimation, is proposed inspired by the E3E structure Finite Element Analysis. The error of using each E3E modeling alternative is studied, by comparing the analytical results with the measurements obtained for several assemblies, including one for a DC-DC converter application case.

Present needs in efficiency and integration drive research toward the miniaturization of power converters. Among the latest components to achieve the desired degree of integration are cored micro-inductors that are still one of the hardest devices to optimize, due to the high number of freedom degrees in their fabrication. In this article, a comprehensive design procedure for these micro-inductors is presented. The proposed method makes it possible to design the optimal device in a single iteration. It also allows the designer to easily ascertain the limits of the inductor in terms of handled current and losses and provides valuable physical insights into the output of the process.