Jicun Lu

Dr. Jicun Lu


Research Focus & Metrics

Academic Career Length

3Years (2024-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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7 April 2024 in Molecules
Verified
Journal Article
Open access
PDF file
HPHuiting Peng
Huiting Peng
YLYiping Liu
Yiping Liu
SFshen feng
shen feng
LXLing Xu
Ling Xu
JLJicun Lu
Jicun Lu
LGLiming Gao
Liming Gao
Efficient sensors for toluene detecting are urgently needed to meet people’s growing demands for both environment and personal health. Metal oxide semiconductor (MOS)-based sensors have become brilliant candidates for the detection of toluene because of their superior performance over gas sensing. However, gas sensors based on pure MOS have certain limitations in selectivity, operating temperature, and long-term stability, which hinders their further practical applications. Noble metals (including Ag, Au, Pt, Pd, etc.) have the ability to enhance the performance of MOS-based sensors via surface functionalization. Herein, ZnO nanoflowers (ZNFs) modified with bimetallic AuPt are prepared for toluene detection through hydrothermal method. The response of a AuPt@ZNF-based gas sensor can reach 69.7 at 175 °C, which is 30 times, 9 times, and 10 times higher than that of the original ZNFs, Au@ZNFs, and Pt@ZNFs, respectively. Furthermore, the sensor also has a lower optimal operating temperature (175 °C), good stability (94% of previous response after one month), and high selectivity towards toluene, which is the result of the combined influence of the electronic and chemical sensitization of noble metals, as well as the unique synergistic effect of the AuPt alloy. In summary, AuPt@ZNF-based sensors can be further applied in toluene detection in practical applications.

28 November 2024 in Micromachines
Verified
Journal Article
Open access
PDF file
JLJicun Lu
Jicun Lu
LLLv Lv
Lv Lv
CZChenghao Zhang
Chenghao Zhang
CZChuting Zhang
Chuting Zhang
YLYang Liu
Yang Liu
Integrating nanocrystalline diamond (NCD) films on silicon chips has great practical significance and many potential applications, including high-power electronic devices, microelectromechanical systems, optoelectronic devices, and biosensors. In this study, we provide a solution for ensuring heterogeneous interface integration between silicon (Si) chips and NCD films using low-temperature bonding technology. This paper details the design and implementation of a magnetron sputtering layer on an NCD surface, as well as the materials and process for the connection layer of the integrated interface. The obtained NCD/Ti/Cu composite layer shows uniform island-like Cu nanostructures with 100~200 nm diameters, which could promote bonding between NCD and Si chips. Ultimately, a heterogeneous interface preparation of Si/Ag/Cu/Ti/NCD was achieved, with the integration temperature not exceeding 250 °C. The TEM analysis shows the closely packed atomic interface of the Cu NPs and deposited Ti/Cu layers, revealing the bonding mechanism.

28 July 2025 in Journal of Materials Science: Materials in Electronics
Verified
Journal Article
Closed access
PDF file
JWJun Wang
Jun Wang
LGLiwei Guo
Liwei Guo
ZLZehou Li
Zehou Li
XJXuening Jiang
Xuening Jiang
XTXue Tianqi
Xue Tianqi
YLYang Liu
Yang Liu

28 August 2026 in Micromachines
Verified
Journal Article
Open access
PDF file
NHNingye He
Ningye He
JLJiahao Li
Jiahao Li
YHYongbin Huang
Yongbin Huang
JLJicun Lu
Jicun Lu
RTRuifang Tie
Ruifang Tie
ZYZongguang Yu
Zongguang Yu
This paper addresses the trade-off between electromagnetic interference (EMI) and common-mode transient immunity (CMTI) performance in capacitively isolated gate drivers for high-frequency silicon carbide (SiC) applications. Starting from the fundamental architecture of on-off keying (OOK) modulation, a novel transmitter (TX) modulator architecture is proposed. The proposed architecture employs a dynamic high-frequency carrier regulation circuit to suppress electromagnetic interference caused by the fixed carrier at the spectral source, while simultaneously utilizing a dynamic substrate regulation circuit to mitigate the impact of common-mode transient interference on the TX side, thereby enhancing the overall CMTI performance. The chip is fabricated in a 0.18-μm BCD process. Simulated carrier spectrum peak attenuation across different process-temperature corners demonstrates that the attenuation ranges from 4.43 dB to 19.621 dB across the fundamental through the third harmonic components. Under the same typical process-temperature corner, the simulated CMTI reaches 220 V/ns, which fully validates the effectiveness of the proposed architecture in both spectral peak reduction for EMI suppression and CMTI enhancement. Post-fabrication chip testing primarily focuses on output performance, with both the simulated carrier spectrum results for EMI and the CMTI being simulation-verified indicators. The measured output voltage range is 15–24 V; at a supply voltage of 15 V, the charging and discharging currents are 5 A and 4.5 A, respectively, and at 24 V, they are 5.7 A and 5.3 A, respectively.