This Letter demonstrates a high-performance 3.3 kV-class β-Ga2O3 vertical heterojunction diode (HJD) along with an investigation into its off-state leakage mechanism. The vertical β-Ga2O3 HJD with field plate assisted deep mesa (FPDM) termination was fabricated using a self-aligned technique to etch the deep mesa to a depth of 9 μm, thereby reducing electric field crowding at the anode edge. In addition, a thick dielectric is deposited to fill the trench, facilitating the utilization of a field plate to further reduce the electric field at the anode edge. TCAD (Technology Computer Aided Design) simulations show significant suppression of electric field crowding at the anode edge. The fabricated HJD exhibits a high current swing of ∼1010 over a temperature range from 25 °C to 175 °C. The specific on-resistance (Ron,sp) is extracted to be 3.9 mΩ cm2, and the breakdown voltage is 3.42 kV with the FPDM termination. These conduction and blocking characteristics lead to a high power figure of merit of 3 GW/cm2, which is one of the highest among multi-kilovolt β-Ga2O3 diodes. Furthermore, the off-state current leakage mechanism of the HJD under a reverse bias up to 2000 V was investigated. The fitted results reveal that the leakage current is primarily dominated by Poole–Frenkel (PF) emission, with the trap level of PF extracted to be 0.36 eV below the conduction band of NiO.

This work demonstrates vertical $\beta $ -Ga2O3 Schottky Barrier Diodes (SBDs) with a field plate assisted deep mesa termination. The $9~\mu \text{m}$ deep mesa is etched using a self-aligned technique to mitigate electric field crowding at the anode edge. Additionally, a dielectric combination of 100nm Al2O3 and $4.8~\mu \text{m}$ SiO2 is deposited to fill the trench, enabling the utilization of a field plate to further reduce the electric field at the anode edge. TCAD simulations demonstrate a substantial reduction in the electric field at the anode edge. Owing to the effective termination, the fabricated SBD shows a high breakdown voltage of 2.5kV, which is 2.3 times larger than the unterminated SBDs. The specific on resistance is 3.78m $\Omega \cdot $ cm2. Consequently, a high Power Figure of Merit (PFOM) of 1.65GW/cm2 is hence achieved, which is among the highest in multi-kilovolts Ga2O3 SBDs. Moreover, a remarkably low forward voltage of 1.45V at 100A/cm2 is also achieved, which is among the lowest in multi-kilovolts Ga2O3 SBDs. The results demonstrate the promising potential of Ga2O3 SBDs for multi-kilovolts applications.

This article presents the design and fabrication results of the silicon carbide (SiC) super-junction Schottky barrier diode (SBD). The impact of two key device structure parameters, i.e., mesa width (MW) and trench width (TW), on the device forward and reverse performance is studied by numeric simulations and measurements. Furthermore, a simple and efficient termination structure, i.e., wide-trench termination, is proposed to protect the device edge. With this termination, the simulated device breakdown voltage is significantly increased from 1423 to 2600 V with a wide-trench termination width (WTW) larger than $20~\mu \text{m}$ . The outermost MW (OMW) of the transition region is also investigated. It is found that the narrower OMW can mitigate the electric field crowding at the top of the outermost mesa and reduce the electrical stress of the dielectric. Devices with different structural parameters are fabricated and measured. The device with WTW $= 50\,\,\mu \text{m}$ and the optimum OMW demonstrates the highest breakdown voltage of 1920 V. The specific ON-resistance ( ${R}_{{\rm \scriptscriptstyle {ON}},\text {sp}}$ ) of this device is 1.6 $\text{m}\Omega \cdot $ cm ² . Subtracting the substrate resistance, the ${R}_{{\rm \scriptscriptstyle {ON}},\text {sp}}$ is only 1.2 $\text{m}\Omega \cdot $ cm ² . Such device performance successfully breaks the theoretical 1-D limit of the SiC unipolar device. Furthermore, the leakage current path of the fabricated device is investigated by thermal emission microscope (EMMI). Future improvements to reduce the leakage current are also provided.

Termination design for 4H-SiC super-junction devices based on “trench-etching and implantation” technology, has been discussed through 3D numeric simulations and experiments. It is found that the existing design concept of super-junction termination extension (SJTE) structure is no longer capable of blocking high voltage due to the hole accumulation on the trench sidewall. In order to provide sufficient protection for the device edge, a novel device structure, i.e., hybrid termination of wide trench and SJTE (WT-SJTE), is proposed. With such WT-SJTE structure, the simulated device breakdown voltage can be improved from 700V to 800V. Furthermore, through the narrow termination mesa design, as predicted by numeric simulations, a noticeable improvement were measured, and a breakdown voltage of 960V was experimentally demonstrated. These results show the effectiveness of the WT-SJTE with such narrow termination mesa design.

Silicon carbide (SiC) super junction (SJ) JFETs fabricated by sidewall implantation with different mesa-widths (MWs) and termination designs are characterized in this article. The device with an MW of $1.8 \mu \text{m}$ and active area of 0.104 mm ² achieves a breakdown voltage of 1086 V and a specific ON-resistance of 0.98 $\text{m}\Omega \,\cdot $ cm ² . The first-quadrant output and transfer characteristics are presented, from which the ON-resistance and pinch-off voltage are extracted and analyzed. The pinch-off voltage shows great stability against the variation of temperature. The forward blocking characteristics under different gate voltages and with different terminations are presented. The gate needs to be negatively biased below the hold-off voltage to prevent the premature breakdown caused by drain-induced barrier-lowering (DIBL) effect. The termination with narrow mesas in the ${x}$ -direction and trapezoidal mesas in the ${y}$ -direction is found to have the highest breakdown voltage, due to its optimized net charge distribution. The third-quadrant output characteristics are presented. Under forward-off gate voltage, the third-quadrant turn-on voltage is found to be determined by the difference of hold-off and pinch-off voltages, and there is a tradeoff between the absolute third-quadrant voltage drop ( $\vert {V}_{\text{on}}\vert $ ) and the maximum current before gate junction turn-on ( ${J}_{\text{umax}}$ ). The third-quadrant performance can be improved by using forward-on gate voltage, a $\vert {V}_{\text{on}}\vert $ lower than 0.2 V (at 100 A/cm ² ) and a ${J}_{\text{umax}}$ larger than 500 A/cm ² are achieved. Finally, the whole output characteristics are modeled to facilitate the device design in different applications.