Silicon carbide (SiC) devices enable more compact and efficient design of applications such as traction inverters and rectifiers. With miniaturization of power electronics, volume and weight of heatsink or cold plate occupies a significant portion. So, thermal design, especially power loss evaluation, is crucial to the whole system. Analytical switching model based on datasheet parameters is usually adopted to evaluate devices' switching loss due to its convenience. However, when applied on SiC metal-oxide-semiconductor field-effect-transistors (MOSFETs), turn-on waveforms of conventional analytical switching model show obvious discrepancy from experiments at both current rising and voltage falling stages. The transfer and capacitance characteristics from datasheet are responsible for that. Due to short channel effect and drain-induced barrier lowering, transfer characteristic during turn on period varies with different drain-to-source voltage vds. Cgd during actual turn on period is also different from that on the datasheet. So, considering the actual turn on process, dynamic transfer characteristic and Qgd are proposed and measured in this paper. After these modifications, switching-on waveforms of the analytical switching loss model match the experiments very well, and error of the estimated loss is less than 5%.

In this work, third-quadrant I-V characterization and surge current tests are carried out on SiC asymmetric trench MOSFET (DUT A) and SiC double-trench MOSFET (DUT B) under various gate-source biases (VGS). The surge capability is found to be uninfluenced by VGS for DUT A. However, it has a 71.4% increase when VGS changes from 0V to -5V for DUT B. The I-V characteristics in third quadrant are measured under various VGS. It is found that the channel is open when the source-drain voltage is >2.5V for DUT A and >1.5V for DUT B at VGS=0V. High temperature measurements are also conducted from 298K to 448K. When VGS=0V, the channel current takes up to 50% at 10A source-to-drain current for DUT B, whereas only 10% for DUT A. This could lead to high current/heat density in the channel of DUT B. The transient resistance is also extracted from the surge I-V trajectories and it is higher for DUT B tested under VGS=0V, which will increase the dissipated surge energy. Finally, failure mechanism is analyzed. For DUT A, aluminum melting contributes to the failure at VGS=-5V and VGS=0V. For DUT B tested at VGS=0V, earlier breakdown happens due to gate oxide failure.

This paper presents the design and experimental analysis of 1200V 4H-SiC Merged PiN Schottky (MPS) diodes. Design considerations and device performances of the MPS diodes are compared with those of the Junction Barrier Schottky (JBS) diodes via numerical simulation and experiments. Due to the limited P+ width/ratio in JBS diodes, PN junction is not turned on until very high current/voltage bias is applied. This increases the device voltage drop and energy dissipation in high current stress conditions. Thanks to the wide P+ region design and the Ohmic contact on the P+ regions, the PN junction turn-on voltage in MPS diodes is substantially decreased, and the surge current capability is improved accordingly. Furthermore, the surge capability of two layouts of the MPS diodes are compared. Layout A with ~60% high P+ ratio can improve the surge current capability by 10% and 20% compared to layout B design (with ~50% P+ ratio) and pure JBS diode (with ~40% P+ ratio), respectively. The reliability of the MPS diodes is studied by repetitive pulse surge current tests. No obvious degradation appears after 5500 test cycles under a surge current stress 20 times the device nominal current rating.

This Letter demonstrates a high-performance 3.3 kV-class β-Ga2O3 vertical heterojunction diode (HJD) along with an investigation into its off-state leakage mechanism. The vertical β-Ga2O3 HJD with field plate assisted deep mesa (FPDM) termination was fabricated using a self-aligned technique to etch the deep mesa to a depth of 9 μm, thereby reducing electric field crowding at the anode edge. In addition, a thick dielectric is deposited to fill the trench, facilitating the utilization of a field plate to further reduce the electric field at the anode edge. TCAD (Technology Computer Aided Design) simulations show significant suppression of electric field crowding at the anode edge. The fabricated HJD exhibits a high current swing of ∼1010 over a temperature range from 25 °C to 175 °C. The specific on-resistance (Ron,sp) is extracted to be 3.9 mΩ cm2, and the breakdown voltage is 3.42 kV with the FPDM termination. These conduction and blocking characteristics lead to a high power figure of merit of 3 GW/cm2, which is one of the highest among multi-kilovolt β-Ga2O3 diodes. Furthermore, the off-state current leakage mechanism of the HJD under a reverse bias up to 2000 V was investigated. The fitted results reveal that the leakage current is primarily dominated by Poole–Frenkel (PF) emission, with the trap level of PF extracted to be 0.36 eV below the conduction band of NiO.