The increased need for access control has motivated a widespread deployment of biometric systems in the last few years. However, recent works indicate that some modalities are fragile and more susceptible to malicious presentation attacks. This has in turn led to the exploration of alternative modalities such as electrocardiogram (ECG) due to its individualized and ubiquitous nature, difficulty in copying, stealing, and/or spoofing, and well-studied acquisition and analysis in the medical domain. In this study, we show that it is indeed possible to exploit previously captured ECG signals. First, we develop a novel “cross-subject attack where a short template of the victim’s ECG captured by an attacker is used to map the attacker’s ECG into the victim’s. Second, we explore “cross-device attacks” where mapping functions are used to replay ECGs collected on a device other than the victim’s device. Third, we explore countermeasures that utilize ECG signal characteristics such as heart rate variability and PPG signal to detect and reject fake samples. Simulation experiments are carried out using two freely available ECG databases under popular fiducial and non-fiducial features. Our proposed cross-device attack framework achieves 45% improvement in success rate compared with the previous state-of-the-art. Moreover, the attack success rate is degraded by 100% when our proposed countermeasure is employed.

Artificial intelligence (AI) and machine learning (ML) techniques have been increasingly used in several fields to improve performance and the level of automation. In recent years, this use has exponentially increased due to the advancement of high-performance computing and the ever increasing size of data. One of such fields is that of hardware design—specifically the design of digital and analog integrated circuits, where AI/ ML techniques have been extensively used to address ever-increasing design complexity, aggressive time to market, and the growing number of ubiquitous interconnected devices. However, the security concerns and issues related to integrated circuit design have been highly overlooked. In this article, we summarize the state-of-the-art in AI/ML for circuit design/optimization, security and engineering challenges, research in security-aware computer-aided design/electronic design automation, and future research directions and needs for using AI/ML for security-aware circuit design.

Comprehensive hardware assurance approaches guaranteeing trust on Integrated Circuits (ICs) typically require the verification of the IC design layout and functionality through destructive Reverse Engineering (RE). It is a resource intensive process that will benefit greatly from the extensive integration of data-driven paradigms, especially in the imaging and image analysis phase. Although obvious, this uptake of data-driven approaches into RE-assisted hardware assurance is lagging due to the lack of massive amounts of high-quality labelled data. In this paper, a large-scale synthetic Scanning Electron Microscopy (SEM) dataset, REFICS, is introduced to address this issue. The dataset, the first open-source dataset in the RE community, consists of 800,000 SEM images over two node technologies, 32nm and 90nm, and four cardinal layers of the IC, namely, doping, polysilicon, contact and metal layers. Furthermore, a framework, based on uncertainty and risk, is introduced to compare the efficacy and benefits of existing RE workflows utilizing ad-hoc steps in its execution. These developments are critical in developing RE-assisted hardware assurance into a scalable, automated and fault-tolerant approach. Finally, the work is concluded with the performance analysis of existing machine learning and deep learning approaches for image analysis in RE and hardware assurance.

Hardware Trojans are malicious modifications in integrated circuits (ICs) with an intent to breach security and compromise the reliability of an electronic system. This article proposes a framework using self-testing, advanced imaging, and image processing with machine learning to detect hardware Trojans inserted by untrusted foundries. It includes on-chip test structures with negligible power, delay, and silicon area overheads. The core step of the framework is on-chip golden circuit design, which can provide authentic samples for image-based Trojan detection through self-testing. This core step enables a golden-chip-free Trojan detection that does not rely on an existing image data set from Trojan-free chip or image synthesizing. We have conducted an in-depth analysis of detection steps and discussed possible attacks with countermeasures to strengthen this framework. The performance evaluation on a 28-nm FPGA and a 90-nm IC validates its high accuracy and reliability for practical applications.

In this paper, we explore the soft biometric classification of 13 demographic and behavioral attributes using phone data collected from 46 subjects. We utilize the results of this analysis to further evaluate reduced search spaces for the primary identification task by implementing a ranking formula which quantifies the performance of each attribute considering the predictability of some attributes compared to others. Results show that soft biometric classification is feasible with up to 90% accuracy; however, because people exhibit high intra-class variance, templates and queries are significantly affected in terms of how well they match, even with reduced search spaces. We analyze these findings using a combination of approaches, including an evaluation of the biometric menagerie, visualizing the distribution of the data, and observing how subjects vary in their soft biometric class across different times of the day.

Outsourced PCB fabrication necessitates increased hardware assurance capabilities. Several assurance techniques based on AOI have been proposed that leverage PCB images acquired using digital cameras. We review state-of-the-art AOI techniques and observe a strong, rapid trend toward ML solutions. These require significant amounts of labeled ground truth data, which is lacking in the publicly available PCB data space. We contribute the FPIC dataset to address this need. Additionally, we outline new hardware security methodologies enabled by our dataset.