In mixed-signal integrated circuits, interference between digital noisy and sensitive analog/RF circuits is a challenging performance issue. The high cost of chip fabrication requires accurate simulation of the circuits’ performance versus signal and noise integrity. In this paper, a substrate crosstalk noise analysis flow is described and the characteristics of the substrate noise coupling mechanism are analyzed. The proposed noise integrity aware simulation flow properly estimates the substrate coupling effect and predicts the analog/RF victim circuit performance degradation due to noise coupling mechanisms. The methodology is implemented seamlessly in the current standard virtuoso-based design suite and is used in parallel with any commercial design tool, compatible with the standard analog/RF simulation process. The efficiency of the proposed methodology is validated by a full substrate crosstalk aware system on chip vehicle, designed in an RFCMOS 65 nm process. Silicon substrate, interconnect parasitics and package parasitics are efficiently modeled so as to enable the substrate noise simulation. A substrate crosstalk system on chip vehicle is designed in a 65 nm RFCMOS. The crosstalk noise victim is a 5 GHz CMOS LNA and the noise aggressor is a 90 kGates digital logic. It is demonstrated that by applying the proposed methodology, substrate crosstalk performance degradation can be efficiently captured. The LNA carrier degradation and the spectrum distortion re efficiently simulated by identifying all of the noise spurs propagating through the common silicon substrate from the digital logic to the custom low noise amplifier noise victim. The respective inter-modulation spurs are also captured.

In the process of construction of a medical apparatus, an infusion pump, among other electronic circuits and mechanical parts, we came with a new idea to include another component, a heater. This is a necessary demand, in order to assure that the temperature of the infused fluid is adapted to the human body temperature. The main feature of the heater is to assure a uniform temperature distribution in the tube. The uniform temperature is necessary in order to avoid the "hot spots " that could lead to degradation of the organic fluids. We have applied modern methods of electronic packaging in the process of the heater design. In this direction, finite element analysis and infrared measurement techniques were used.

This paper presents a study on planar inductors with or without magnetic medium. In both situations the inductor parameters will be computed based on closed form expressions and on finite element simulations. Also, for measurement purposes a large number of test structures with different shapes and dimensions will be realized. Regarding the magnetic medium, which is thought as a magnetic thick layer, a study is intended in direction of determining the effect of this medium on inductor parameters. The inductor will be analyzed not only from inductance point of view, but also the parasitics will be investigated and hence the other parameters as the quality factor and self resonance frequency will be determined.

This study investigates the temperature-dependent electrical behavior of 400 F/2.7 V supercapacitors, both at the single cell level and in packs of six cells connected in series (6S configuration), over the temperature range of −20 °C to 58 °C, for further development of sustainable energy storage systems (ESSs). In the context of the increasing share of renewable energy sources and the development of low-environmental-impact storage systems, supercapacitors represent a viable technology due to their high power density, energy efficiency, and extended operational lifespan. The work is motivated by the critical influence of temperature on the Equivalent Series Resistance (ESR), voltage stability, and charge–discharge dynamics in real energy storage applications. Experimental characterization was performed using controlled Constant-Current (CC) and Constant-Voltage (CV) charge–discharge cycles with automatic data acquisition, complemented by temperature regulation via thermal chambers. Different parameters like ESR, Open-Circuit Voltage (OCV), and transient current profiles were extracted for each cell, while the pack-level behavior was derived by analyzing the experimental data. Additional investigations have included voltage recovery analysis. The results showed that the capacitance remains largely stable over the entire temperature range investigated, while the ESR exhibits a strong nonlinear dependence, increasing significantly at low temperatures and contributing to a reduced efficiency. A common transition region was identified around the 20–25 °C range, where the system performance is optimal. The voltage recovery increases with temperature, indicating increased ionic mobility and faster charge redistribution. Significant non-uniformity was observed between cells connected in series, with some cells exhibiting higher thermal sensitivity and instability. Optimizing the use of supercapacitors within their operating temperature range may contribute to increasing energy efficiency, to extending system lifespan, and to developing sustainable solutions for modern ESSs. In conclusion, the 6S supercapacitor pack exhibits a strongly temperature-dependent electrochemical dynamics, governed mainly by the ESR and diffusion processes. These findings highlight the need for thermal modeling and integration of balancing strategies in series-connected supercapacitor packs, which can be used for the expansion of the environmental-friendly ESSs.