In this work, an evaluation methodology is proposed to study the impacts of state instability and retention failure of filamentary analog resistive random access memory (FA-RRAM) on the performance of deep neural networks (DNNs). Based on the methodology, an analytic model for the statistical state instability and retention behaviors is applied to evaluate the impacts of the reliability of FA-RRAM on an 11-layer FA-RRAM-based DNN for CIFAR-10 recognition. Simulations indicate that the recognition accuracy of the 11-layer DNN decreases rapidly with the increase of the baking time (t = 10 ⁴ s, 16.3% accuracy loss at 125 °C) due to the overlapping among neighboring resistance levels. To mitigate the accuracy loss caused by state instability and retention failure, the optimization method including the optimized synapse cell and the refresh operation scheme is developed. With the optimization method, the robustness of the FA-RRAM-based DNN is enhanced significantly in which no accuracy loss is observed even after 10 ⁷ s (at 125 °C, 5 × 10 ³ s/refresh).

In this work, a new operation scheme is developed to improve the state stability of multi-level resistive random-access memory (RRAM) array. We found that the state instability after programming is mainly derived from the excessive oxygen vacancies generated by the abrupt SET process. Based on the understanding of the state stability after operation, triangular pulse is adopted for the programming of multi-level RRAM, which can effectively suppress the short-term relaxation and improve the long-time retention. Comparison results show that the degradation on recognition accuracy of Cifar-10 over time in ResNet18 network reduces from 8.07% by using square pulse programming to 0.93% by utilizing the proposed operation scheme.

Memristors, possessing volatile and nonvolatile switching characteristics, exhibit great potential for high-density data storage and neuromorphic computing system. However, the adjustment of device electrical characteristics, such as drive current and threshold voltage, is still not specific, which hinders the optimization of memristors for desired applications. In this work, we fabricated Ag-based memristive devices with different stoichiometries and density of silicon suboxide (SiO _x ) dielectric layers, which can both exhibit volatile and nonvolatile switching behaviors and the volatile and nonvolatile switching can transfer each other by varying the compliance current. The experimental results showed that high stoichiometry of SiO _x film will lead to high compliance current for the transition from volatile to nonvolatile characteristics in Ag-based memristors. A model based on classical nucleation theory (CNT) was proposed to explain the transition current of different samples. It was found that the volatile and nonvolatile switching behaviors had a close correlation with the surface energy of conductive filament and defects in the dielectric layer. Besides, the dielectric layer of memristors deposited under low RF power exhibited large density, which caused large threshold voltage during the set process. This work provides the adjustment methods of drive current and threshold voltage from material properties.

A physics-based compact model for retention behaviors of conductive-bridge random access memory (CBRAM) is developed by modeling: 1) the material-dependent metal atom transport from the conductive filament into the electrolyte; and 2) the conduction percolation controlled by the atom concentration. Considering the material properties of the metal and electrolyte, this compact model can well reproduce the retention behaviors of the CBRAM in both low resistance state and high resistance state (HRS) for various material stacks under various operating temperatures. Two types of HRS resistance shift can be reproduced by accurately modeling the percolation paths. The compact model can enable the reliability projection of cells in a crossbar array.

Transparent electrodes are a core component for transparent electron devices, photoelectric devices, and advanced displays. In this work, we fabricate fully-transparent, highly-conductive Al-doped ZnO (AZO) films using an atomic layer deposition (ALD) system method of repeatedly stacking ZnO and Al₂O₃ layers. The influences of Al cycle ratio (0, 2, 3, and 4%) on optical property, conductivity, crystallinity, surface morphology, and material components of the AZO films are examined, and current conduction mechanisms of the AZO films are analyzed. We found that Al doping increases electron concentration and optical bandgap width, allowing the AZO films to excellently combine low resistivity with high transmittance. Besides, Al doping induces preferred-growth-orientation transition from (002) to (100), which improves surface property and enhances current conduction across the AZO films. Interestingly, the AZO films with an Al cycle ratio of 3% show preferable film properties. Transparent ZnO thin film transistors (TFTs) with AZO electrodes are fabricated, and the ZnO TFTs exhibit superior transparency and high performance. This work accelerates the practical application of the ALD process in fabricating transparent electrodes.

The resistivity of Cu interconnects increases rapidly with continuously scaling down due to scatterings, causing a major challenge for future nodes in M0 and M1 layers. Here, A Boltzmann-transport-equation-based Monte Carlo simulator, including all the major scattering mechanisms of interconnects, is developed for the evaluation of electron transport behaviors. Good agreements between our simulation and the experimental results are achieved for Cu, Ru, Co, and W, from bulk down to 10 nm interconnects. The line resistance values of the four materials with the inclusion of liner and barrier thicknesses are calculated in the same footprint for a fair comparison. The impact of high aspect ratio on resistivity is analyzed for promising buried power rail materials, such as Ru and W. Our results show that grain boundary scattering plays the most important role in nano-scale interconnects, followed by surface roughness and plasma excimer scattering. Surface roughness scattering is the origin of the resistivity decrease for high-aspect-ratio conductive rails. In addition, the grain sizes for the technical nodes of different materials are extracted and the impact of grain size on resistivity is analyzed.