Improving system lifetime and robustness is a key to advancing self-powered platforms for real world applications. A complete self-powered, battery-less, wearable platform requires a microwatt-power system-on-chip (SoC), operating reliably within this budget, capable of surviving long periods without charging, and recovering from power loss to its previous state. To meet these requirements, we designed a wireless sensing heterogeneous system-in-package (SiP) containing an ultra-low power (ULP) SoC, a non-volatile boot memory (NVM), and a 2.4 GHz frequency shift key (FSK) radio, all integrated with custom ULP interfaces. The SoC includes a fully integrated energy harvesting platform power manager (EH-PPM) to power the SiP and other commercial sensors. The EH-PPM is designed for small loads and powers the SoC and peripherals while drawing very low operating current. The SoC also includes a digital system data-flow for sensing applications, an analog front end for ECG signal acquisition, and a cold-boot management system (CBMS) for boot and recovery from the NVM. The CBMS enables integration of the SoC with the ULP NVM to create a wearable formfactor, self-powered system capable of recovery from power loss. The SoC also includes a radio interface tightly integrated with a compression accelerator to efficiently communicate with the FSK transmitter and reduce the FSK's transmission time. This tight integration between accelerators on the SoC and peripherals is another feature that reduces the system's power consumption by reducing the code size and number of memory accesses required to perform an operation. The SoC consumes 507 nW average power while running free-fall detection, 519 nW average power while measuring ambient temperature, and 1.02 μW during continuous ECG monitoring and post-processing.
This paper presents a power efficient analog front-end (AFE) for electrocardiogram (ECG) signal monitoring and arrhythmia diagnosis. The AFE uses low-noise and low-power circuit design methodologies and aggressive voltage scaling to satisfy both the low power consumption and low input-referred noise requirements of ECG signal acquisition systems. The AFE was realized with a three-stage fully differential AC-coupled amplifier, and it provides bio-signal acquisition with programmable gain and bandwidth. The AFE was implemented in a 130 nm CMOS process, and it has a measured tunable mid-band gain from 31 to 52 dB with tunable low-pass and high-pass corner frequencies. Under only 0.5 V supply voltage, it consumes 68 nW of power with an input-referred noise of 2.8 µVrms and a power efficiency factor (PEF) of 3.9, which makes it very suitable for energy-harvesting applications. The low-noise 68nW AFE was also integrated on a self-powered physiological monitoring System on Chip (SoC) that is used to capture ECG bio-signals. Heart rate extraction (R-R) detection algorithms were implemented and utilized to analyze the ECG data received by the AFE, showing the feasibility of <100 nW AFE for continuous ECG monitoring applications.
11 January 2018 in IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents a quadrature digital transmitter operating in the multiuse radio service (MURS) frequency band for low power and long-range Internet of Things applications. We introduce a narrowband modulation scheme compliant with the MURS band as an alternative solution for low data-rate wide-area coverage. We present a transmitter architecture based on switched-current power amplifier cells that uses a digital class-B input codeword profile in combination with 25% duty cycled LOs to achieve high efficiency at low transmitted power levels. The transmitter is implemented in a 65-nm CMOS process and its performance is measured for single-tone and multitone transmissions at 5 and 384 kb/s, respectively. It operates from a 1.2-V supply and delivers a peak efficiency of 41% at a peak output power of 0 dBm. The error vector magnitude at 384 kb/s is 4.2%.