Hyperspectral imaging has emerged as an effective powerful tool in plentiful military, environmental, and civil applications over the last three decades. The modern remote sensing approaches are adequate for covering huge earth surfaces with phenomenal temporal, spectral, and spatial resolutions. These features make HSI more effective in various applications of remote sensing depending upon the physical estimation of identical material identification and manifold composite surfaces having accomplished spectral resolutions. Recently, HSI has attained immense significance in the research on safety and quality assessment of food, medical analysis, and agriculture applications. This review focuses on HSI fundamentals and its applications like safety and quality assessment of food, medical analysis, agriculture, water resources, plant stress identification, weed & crop discrimination, and flood management. Various investigators have promising solutions for automatic systems depending upon HSI. Future research may use this review as a baseline and future advancement analysis.

Cryptocurrency mining and blockchain technology using renewable energy as the main electricity source has gained attention for sustainable development in financial areas. However, very few studies have been reported concerning the power usage of cryptocurrencies using renewable energy. In this article, we report the effect of overclocking and undervolting on power usage and the hash rate for mining dogecoin with solar energy as renewable energy. The mining rig used in this work consists of different graphics processing units (GPUs) and non-LHR (lite hash rate) cards. The UnMineable software has been used for mining dogecoin as well as for wallet integration. The results indicate that mining dogecoin with solar energy as renewable energy consumes 2000 Watts power with overclocking and 1700 Watts power with undervolting technique. This work implicates the potential future of crypto-mining with renewable energy and the hardware configuration associated with it, which is expected to reduce e-waste and improve sustainable development. To reduce the e-waste and high electricity consumption, we have introduced two important techniques named GPU optimization and use of renewable energy for mining, which helps the miners to reduce the e-waste and electricity consumption significantly at the same time getting most out of the GPU by not having any impact on the environment.

Higher charge mobility, gate control, and better electrostatics are the key reasons that make carbon nanotube field effect transistor (CNTFET) a better candidate to become the successor of conventional CMOS transistors. However, the increased charge mobility also enhances the leakage power. This work uses CNTFET for designing a low-power eight-transistor static random access memory (8T SRAM) cell. The leakage power of the proposed cell is reduced by 2.21×compared to conventional 6T SRAM at 0.3V with similar CNTFET parameters. The read and write power delay product of the proposed design is improved by 1.02×and 1.85×, respectively. Moreover, the read/ write/ hold static noise margin of the proposed cell is also enhanced by 1.98×/ 0.99×/ 1.01×, respectively, compared to the conventional 6T design. The proposed cell is also compared with three already proposed CNTFET based 8T SRAM designs. Cadence Virtuoso simulation tool and Stanford University 32 nm CNTFET verilog-A model file are used to achieve simulation results.

Design of Low-power signal conditioning system comprising of biopotential amplifier (BPA) and low pass Filter (LPF) remains one of the most critical block of system on chips (SoCs) targeted for wearable non-invasive and semi-invasive biomedical applications like electroencephalography and electrocorticography. Design of the same is a challenging task owing to noise-power trade-off in BPA and dependency of process voltage and temperature variations on the filter circuit. We report the design of a signal conditioning system comprising of a capacitively coupled capacitive feedback (CC-CF) BPA and composite p-channel metal oxide semiconductor (PMOS) based complementary source-follower LPF. The results obtained in Cadence with standard 0.18 µ m technology and BSIM3V3 MOS models for the proposed signal conditioning system provide a DC-gain value of 36.76 dB, bandwidth of 280 mHz–174 Hz, power consumption of 24.54 µ W, supply current of 24.54 µ A, area consumption of 0.212826 mm ² from ± 0.5 V supply voltage. Robustness of this signal conditioning system has been checked by performing 200 runs of monte carlo simulations. The statistical results obtained for gain of (CC-CF) BPA, complementary source follower (CSF-C) LPF and signal conditioning system show mean ( µ ) values of 39.93 dB, −3.92 dB and 35.96 dB as well as standard deviation ( σ ) of 135.433 mdB, 1.90 dB, and 2.00 dB respectively. The CC-CF BPA architecture, CSF-C LPF and complete signal conditioning system are expected to be used in SoCs targeted for various low-power biomedical applications.

Design of amplifier circuits with low-noise operable at low-power to be used, especially for implantable neural interfaces, remains a huge challenge. This research paper presents the design of a low-noise low-voltage neural recording amplifier suitable for amplifying local field potentials and extracellular action potentials so as to meet the end requirement of an implantable neuro-medical system. Critical performance parameters of the smaller circuit blocks of the complete neural amplifier architecture have been found with the help of detailed mathematical analysis and then verified by the simulations conducted using 0.18 µm 4M1P foundry Semi-conductor Laboratory N-well process. The neural amplifier design proposed in this paper passes neural signal of interest with a mid-band gain of 49.9 dB over a bandwidth of 5.3 Hz–8.6 kHz, draws only 11.5 µW of power from ±0.9 V supply voltage, and exhibits an input-referred noise of 2.6 µVrms with a noise efficiency factor of 2.27. The area consumed by the proposed neural amplifier architecture is 0.192 mm2. The complete circuit design carried out in this paper should prove to be useful in equipment for the diagnosis of neurological disorders.