This paper focuses on the effect of single event transients on AlGaN/GaN on sapphire high-electron-mobility-transistors (HEMTs). This results in a novel study in high performance transistors using sapphire substrate. Technology computer aided design tools are used in order to perform the radiation simulations, once the DC response of the transistors have been reproduced. Results show the relationship of the drain current density with ion energy and angle of incidence. The current increases as the ion penetrates deeper in the device due to higher energies, while it decreases as the angle increases. To our knowledge, angle strikes have never been studied before in AlGaN/GaN HEMTs. Several charge collection mechanisms are discussed and their relationships with ion energy and angle of incidence are established.

In this article, an ac conductance method has been successfully employed to extract the thermal resistance of GaN-based high-electron-mobility transistors (HEMTs) on silicon. The resulting thermal resistances, when varying the channel length and gate width, are comparable to those obtained with pulsed measurements, by making use of positive drain-to-source pulsed voltages from a zero power dissipation quiescent bias point and 3-D thermal simulations. Furthermore, the gate geometry dependence of the thermal resistance of GaN-based HEMTs has been successfully modeled for circuit-design purposes.

High-temperature processing steps are frequently used in manufacture of AlGaN/(AlN/)GaN high electron mobility transistors (HEMTs). The thermal budgets drive Al diffusion into the GaN channel, increase alloy disorder scattering (ADS) of the two-dimensional-electron-gas (2DEG), and degrade the 2DEG mobility. By correlating the ADS to device thermal budget, we propose an analytical model to calculate the ADS limited mobility as a function of Al diffusion lengths (LD,Al) in AlGaN/(AlN/)GaN HEMTs. The simulation indicates that the ADS is a significant mobility degradation mechanism whose scattering rate increases with the 2DEG density and the LD,Al. The findings explain the generally observed trends in the literature that the 2DEG mobility and sheet resistances of GaN heterostructures degrade with increased thermal budgets, especially after >900 °C processing.

To enable CMOS-compatible GaN HEMTs for the next generation of communication systems (5G and beyond), a low gate resistance is of great importance since it directly affects the RF power gain and fMAX of the transistor. In this article, the impact of various gate-metal stacks on the gate resistance and RF performance of the devices is studied. The optimized Ti-free gate-metal process leads to fMAX enhancement up to ~50% for devices scaled down to 0.32-μm gate lengths. The gate resistance for the T-shaped gate is modeled from the S-parameters and validated on various gate field plate geometries. The tradeoff between the gate resistance and the parasitic capacitance in GaN HEMTs is highlighted in this case.