This article investigates the qualification of photovoltaic micromodules intended for energy harvesting in Internet-of-Things systems, with emphasis on the degradation mechanisms induced by accelerated environmental aging typical of tropical conditions. The study employs multiple complementary characterization techniques—including pulsed I–V measurements, electroluminescence imaging, and impedance spectroscopy—combined with multivariate statistical analysis to support decision-making regarding acceptance criteria, fault prediction models, maintenance scheduling, and failure mode clustering.In addition, dimensionality-reduction methods are explored to extract the most relevant indicators from empirical datasets and to improve interpretability when dealing with highly correlated or redundant variables. The work addresses a regulatory gap affecting photovoltaic devices below 5 Wp, a class of modules whose deployment is rapidly expanding in remote, autonomous, and low-power IoT applications, yet remains largely unsupported by existing reliability and certification standards.

The mandates of the Circular Economy (CE) and Industry 5.0 necessitate unprecedented life cycle traceability and management for complex products, such as electronics and lithium-ion batteries. The Digital Product Passport (DPP) has emerged as the centralized data framework for this transition. However, effective DPP implementation requires the robust integration of technologies to overcome the technical challenges of scalability, data integrity, and legacy system management. This work shifts from a high-level conceptual overview to an in-depth technical analysis, detailing the integration architecture of the DPP with the Internet of Things (IoT), Digital Twins (DTs), and Artificial Intelligence (AI). Specifically, we focus on how IoT, via embedded sensors and NFC/RFID tags, acts as the dynamic data carrier that feeds DT. For the battery sector, we propose a technical framework that utilizes the DPP to continuously track State of Health (SoH) and State of Charge (SoC), throughout the entire life cycle. AI/Machine Learning is then integrated within the DT to enable accurate predictions of degradation and failure, directly addressing reliability concerns and optimizing the second life and recycling phases. Our focus is on tackling critical bottlenecks, such as interoperability between IT systems and data storage scalability (e.g., via robust Cloud or Blockchain solutions), ensuring the DPP is established not just as a static data repository, but as a dynamic and predictive tool for product reliability management and regulatory compliance.

This work addresses the qualification of photovoltaic micromodules intended for energy-harvesting applications in Internet of Things systems and proposes a novel qualification method based on highresolution electronic signature masks obtained through Time-Domain Reflectometry. The method applies frequency-to-time conversion of measured S11 parameters acquired using a Vector Network Analyzer under laboratory conditions. Accelerated reliability testing is employed as a sample preparation stage to validate the proposed qualification approach and to contextualize micromodules within a framework beyond existing regulatory standards, which currently exclude PV devices below 5 Wp. The qualification method based on pass/fail TDR signature masks demonstrated in this study has the potential to become a powerful tool for quality inspection of photovoltaic micromodules by assessing deterioration over time. The research introduces TDR technology—traditionally associated with high-frequency telecommunications—into the photovoltaic contex for research and development, manufacturing inspection, and certification purposes.

This paper presents the design and implementation of a 64-Multi-Phased Time-to-Digital Converter (TDC64) architecture on a low-cost Cyclone V FPGA. Operating at 500 MHz, the architecture successfully achieves a theoretical resolution of 31.25 picoseconds (ps). The modular design leverages a multi-phased counter methodology to significantly enhance temporal granularity. The performance was comprehensively characterized in two stages. Internal analysis, using the Signal Tap Logic Analyzer, confirmed the design's integrity, yielding a measurement result of 9660 for a 300 ns interval, representing a low deviation of approximate 0.62 %. Linearity tests conducted over a 20 ns span showed excellent performance with differential nonlinearity (DNL) ranging from +0.053 to -0.101 and integral nonlinearity (INL) between -0.192 and -0.218. External testing, utilizing a waveform generator and oscilloscope, revealed an uncompensated resolution of 47.43 ps (34 % deviation). Mitigating the noise, the compensated resolution for an interval of 300 ns result in 9,596, a resolution of 31.263 picoseconds, which represents 0.04%. A remarkable result close to the theoretically expected value. The mean values were employed to evaluate the linearity, yielding DNL of +0,0560 and -0,0129, as well as INL of +0,0484 and -0,2104. Representing high linearity and high resolution compared with a previous noisy entry signal. This work demonstrates that high-end timing performance is attainable on cost-effective FPGA platforms.