In this paper, a new Si/SiGe heterojunction tunneling field-effect transistor with a T-shaped gate (HTG-TFET) is proposed and investigated by Silvaco-Atlas simulation. The two source regions of the HTG-TFET are placed on both sides of the gate to increase the tunneling area. The T-shaped gate is designed to overlap with N+ pockets in both the lateral and vertical directions, which increases the electric field and tunneling rate at the top of tunneling junctions. Moreover, using SiGe in the pocket regions leads to the smaller tunneling distance. Therefore, the proposed HTG-TFET can obtain the higher on-state current. The simulation results show that on-state current of HTG-TFET is increased by one order of magnitude compared with that of the silicon-based counterparts. The average subthreshold swing (SS) of HTG-TFET is 44.64 mV/dec when V g is varied from 0.1 to 0.4 V, and the point SS is 36.59 mV/dec at V g = 0.2 V. Besides, this design cannot bring the sever Miller capacitance for the TFET circuit design. By using the T-shaped gate and SiGe pocket regions, the overall performance of the TFET is optimized.

Non-volatile memory (NVM) will play a very important role in the next-generation digital technologies, including the Internet of things. The metal-oxide memristors, especially based on HfO2, have been favored by lots of researchers because of its simple structure, high integration, fast operation speed, low power consumption, and high compatibility with advanced (complementary metal oxide silicon) CMOS technologies. In this paper, a 20-level stable resistance states Al-doped HfO2-based memristor is presented. Its cycles endurance, data retention time, and resistance ratio are larger than 103, > 104 s, and > 10, respectively.

In this paper, a dielectric modulated double source trench gate tunnel FET (DM-DSTGTFET) based on biosensor is proposed for the detection of biomolecules. DM-DSTGTFET adopts double source and trench gate to enhance the on-state current and to generate bidirectional current. In the proposed structure, two cavities are etched over 1 nm gate oxide for biomolecules filling. A 2D simulation in the Technology Computer-Aided Design (TCAD) is adopted for the analysis of sensitivity study. The results show that under low supply voltage, the current sensitivity of the DM-DSTGTFET is as high as 1.38 × 10⁵, and the threshold voltage sensitivity can reach 1.2 V. Therefore, the DM-DSTGTFET biosensor has good application prospects due to its low power consumption and high sensitivity.

In this paper, a silicon-based T-shape gate dual-source tunnel field-effect transistor (TGTFET) is proposed and investigated by TCAD simulation. As a contrastive study, the structure, characteristic, and analog/RF performance of TGTFET, LTFET, and UTFET are discussed. The gate overlap introduced by T-shape gate can enhance the efficiency of tunneling junction. The dual-source regions in TGTFET can increase the on-state current (I_ON) by offering a doubled tunneling junction area. In order to further improve the device performance, the n+ pocket is introduced in TGTFET to further increase the band-to-band tunneling rate. Simulation results reveal that the TGTFET’s I_ON and switching ratio (I_ON/I_OFF) reach 81 μA/μm and 6.7 × 10¹⁰ at 1 V gate to source voltage (V_g). The average subthreshold swing of TGTFET (SS_avg, from 0 to 0.5 V V_g) reaches 51.5 mV/dec, and the minimum subthreshold swing of TGTFET (SS_min, at 0.1 V V_g) reaches 24.4 mV/dec. Moreover, it is found that TGTFET have strong robustness on drain-induced barrier lowering (DIBL) effect. The effects of doping concentration, geometric dimension, and applied voltage on device performance are investigated in order to create the TGTFET design guideline. Furthermore, the transconductance (g_m), output conductance (g_ds), gate to source capacitance (C_gs), gate to drain capacitance (C_gd), cut-off frequency (f_T), and gain bandwidth (GBW) of TGTFET reach 232 μS/μm, 214 μS/μm, 0.7 fF/μm, 3.7 fF/μm, 11.9 GHz, and 2.3 GHz at 0.5 V drain to source voltage (V_d), respectively. Benefiting from the structural advantage, TGTFET obtains better DC/AC characteristics compared to UTFET and LTFET. In conclusion, the considerable good performance makes TGTFET turn into a very attractive choice for the next generation of low-power and analog/RF applications.

In this paper, a dopingless fin-shaped SiGe channel TFET (DF-TFET) is proposed and studied. To form a high-efficiency dopingless line tunneling junction, a fin-shaped SiGe channel and a gate/source overlap are induced. Through these methods, the DF-TFET with high on-state current, switching ratio of 12 orders of magnitude and no obvious ambipolar effect can be obtained. High κ material stack gate dielectric is induced to improve the off-state leakage, interface characteristics and the reliability of DF-TFET. Moreover, by using the dopingless channel and fin structure, the difficulties of doping process and asymmetric gate overlap formation can be resolved. As a result, the structure of DF-TFET can possess good manufacture applicability and remarkably reduce footprint. The physical mechanism of device and the effect of parameters on performance are studied in this work. Finally, on-state current (I_ON) of 58.8 μA/μm, minimum subthreshold swing of 2.8 mV/dec (SS_min), average subthreshold swing (SS_avg) of 18.2 mV/dec can be obtained. With improved capacitance characteristics, cutoff frequency of 5.04 GHz and gain bandwidth product of 1.29 GHz can be obtained. With improved performance and robustness, DF-TFET can be a very attractive candidate for ultra-low-power applications.

A self-compliance resistive random access memory (RRAM) achieved through thermal annealing of a Pt/HfO_x/Ti structure. The electrical characteristic measurements show that the forming voltage of the device annealing at 500 °C decreased, and the switching ratio and uniformity improved. Tests on the device’s cycling endurance and data retention characteristics found that the device had over 1000 erase/write endurance and over 10⁵ s of lifetime (85 °C). The switching mechanisms of the devices before and after annealing were also discussed.