Computing-In-Memory (CIM), based on non-von Neumann architecture, has lately received significant attention due to its lower overhead in delay and higher energy efficiency in convolutional and fully-connected neural network computing. Growing works have given the priority to researching the array of memory and peripheral circuits to achieve multiply-and-accumulate (MAC) operation, but not enough attention has been paid to the high-precision hardware implementation of non-linear layers up to now, which still causes time overhead and power consumption. Sigmoid is a widely used non-linear activation function and most of its studies provided an approximation of the function expression rather than totally matched, inevitably leading to considerable error. To address this issue, we propose a high-precision circuit implementation of the sigmoid, matching the expression exactly for the first time. The simulation results with the SMIC 40 nm process suggest that the proposed circuit implemented high-precision sigmoid perfectly achieves the properties of the ideal sigmoid, showing the maximum error and average error between the proposed simulated sigmoid and ideal sigmoid is 2.74% and 0.21%, respectively. In addition, a multi-layer convolutional neural network based on CIM architecture employing the simulated high-precision sigmoid activation function verifies the similar recognition accuracy on the test database of handwritten digits compared to utilize the ideal sigmoid in software, with online training achieving 97.06% and with offline training achieving 97.74%.

An ultra-low quiescent current resistor-less power on reset circuit is presented in this paper. The circuit is used in energy harvesting systems to change boost converter from startup state to PWM modulation state. It integrates power on reset (POR) and brown out detection (BOD) functions without resistors or bandgaps overhead. Dual threshold detection (DTD) technology is used instead of a large size delay cell in generation of pulse signals. The circuit has been implemented in a 0.13μm standard CMOS technology. The active area and the quiescent current of the circuit are 154.4μm × 26.8μm and about 1nA, respectively. Ultra-low quiescent current and small area make the proposed circuit suitable to be applied in low power applications like energy harvesting and beyond.

A high-precision current-mode bandgap reference (BGR) circuit with a high-order temperature compensation is presented in this paper. In order to achieve a high-precision BGR circuit, the equation of the nonlinear current has been modified and the high-order term of the current flowing into the nonlinear compensation bipolar junction transistor (NLCBJT) is compensated further. According to the modified equation, two solutions are designed to improve the output accuracy of BGR circuits. The first solution is to divide the NLCBJT branch into two branches to reduce the coefficient of the nonlinear temperature compensation current. The second solution is to inject the nonlinear current into the two branches based on the first one to further eliminate the temperature coefficient (TC) of the current flowing into the NLCBJT. The proposed BGR circuit has been designed using the Semiconductor Manufacturing International Corporation (SMIC) 55 nm CMOS process. The simulation results show that the variations in currents flowing into NLCBJTs improved from 148.41 nA to 69.35 nA and 7.4 nA, respectively, the TC of the output reference current of the proposed circuit is approximately 3.78 ppm/°C at a temperature range of −50 °C to 120 °C with a supply voltage of 3.3 V, the quiescent current consumption of the entire BGR circuit is 42.13 μA, and the size of the BGR layout is 0.044 mm², leading to the development of a high-precision BGR circuit.