This article presents a broadband fully integrated Doherty power amplifier (DPA) using a continuous-mode combining load. It is illustrated that the continuous-mode impedance condition in back-off and saturation for Doherty operation can be achieved with a simple impedance inverter network (IIN) that can be realized using lumped components in gallium nitride (GaN) monolithic microwave integrated circuits (MMICs). A DPA was designed and fabricated using the 250-nm GaN process to validate the proposed architecture and design methodology. The fabricated DPA chip attains around 8 W saturated power from 4.1 to 5.6 GHz. About 38.5%–46.5% drain efficiencies are achieved at 6-dB output power back-off within the entire design band. When driven by a 100-MHz OFDM signal with 6.5-dB peak-to-average power ratio (PAPR), the proposed DPA achieves better than −45-dBc adjacent channel leakage ratio (ACLR) and higher than 38% average efficiency at 4.4 and 5.2 GHz after digital predistortion.

In this paper, a high-efficiency Doherty power amplifier (DPA) using the complex combining load (CCL) with noninfinity peaking impedance for broadband operation is presented. By applying the CCL, the load impedance of the carrier amplifier at saturation power level can be compensated at different operation frequencies. Considering the influences of the output impedance of the peaking PA on the carrier PA, a detailed analysis of the optimal noninfinity peaking output impedance with the CCL is carried out on the whole operation frequency range. Theoretical analysis of the output power and drain efficiency (DE) reveals that the CCL can offer a new degree of freedom for extending the bandwidth of the DPA. Based on the proposed theory, a modified DPA working over the frequency band of 1.1-2.4 GHz (bandwidth of 74%) is designed and fabricated based on GaN HEMT devices. Experimental results exhibit 6-dB output back-off drain efficiencies of 43.8%-54.9% and saturated drain efficiencies of 55.4%-68% can be obtained. The saturated output power of the DPA is 43.3-45.4 dBm with a gain of 9.5-11.1 dB across the whole operation band. When driven with long-term evolution modulated signals with 6.5-dB peak-to-average power ratio, the DPA exhibits an adjacent channel leakage ratio better than -49 dBc while maintaining a DE of 44% after digital predistortion linearization.

In this letter, a novel methodology for designing concurrent dual-band continuous class-J mode Doherty power amplifier (DPA) with precise impedance terminations is presented. First, the required impedance condition of the carrier amplifier which operates in continuous class-J mode at the back-off region is analyzed in detail. Based on the proposed theory, the fundamental impedance is realized by taking advantage of the noninfinity output impedance of the peaking stage, then the second harmonic impedance is realized with a harmonic tuning postmatching network. A 1.8-/2.6-GHz dual-band DPA employing commercial GaN devices is designed and implemented to validate the proposed method. The fabricated DPA can achieve 68.5% and 75% drain efficiencies (DEs) for saturated power level at 1.8 and 2.6 GHz, respectively. For the 6-dB back-off region, the measured DEs are 64% and 63% at the two designed frequencies.

Though Outphasing power amplifiers (OPAs) can maintain high efficiency over a large dynamic range, their bandwidth should be further extended to satisfy the wireless communication systems. This paper presents a complex combining method for designing wideband OPAs. Complex combining impedance is adopted to compensate the frequency dispersion of the active load modulation in the OPA, leading to an extended bandwidth. It is illustrated for the first time that the load modulation trajectories of the OPA can be corrected over a wide bandwidth by elaborately designing the complex combining impedance. Furthermore, a comprehensive theoretical analysis is conducted on the transmission-line based combiner to derive the complex load impedance needed at different frequency points, recovering the back-off efficiency of a broadband OPA. As a proof of concept, a broadband OPA operating over 1.7-2.2 GHz is designed and fabricated. The experimental results show the fabricated OPA delivers a maximum output power of 43.1-44.3 dBm with a drain efficiency of 63.4%-78.4%. Meanwhile, a 6-dB back-off drain efficiency of 45.5%-70.4% can also be achieved by the fabricated OPA.

In this paper, a design approach for a high-efficiency concurrent dual-band power amplifier (PA) with precise harmonic control up to third order is proposed. With the precise harmonic control approach, the high-efficiency performance of the PA can be improved at two arbitrary wide interval frequencies. Based on the inherent impedance matching flexibility of the continuous Class-F (CCF) operating mode, the design spaces of fundamental and harmonic impedances of the PA are largely expanded. The optimal impedances of a CCF PA mode at the internal current-generator (I-gen) plane and package plane are investigated, respectively, and a novel dual-band matching network topology is designed to simultaneously present required load impedances at the fundamental and harmonic impedances of both operation frequencies. First, a harmonic control network is designed to control the harmonic impedances precisely for CCF operation. Then, the fundamental impedances are synthesized using the real frequency technique. To verify the validity of proposed methodology, a dual-band CCF PA operating at 2.6 and 3.5 GHz is designed, fabricated, and measured. The measurement results show that the peak drain efficiency is 76.7% with an output power 42.4 dBm at the lower band and 72.8% with an output power 41.1 dBm at the upper band.

This article presents an analytical and coherent design method for the generalized high-efficiency broadband parallel-circuit (PC) Class-E/F₃ power amplifier (PA). By importing the initial phase shift of the third harmonic and adding series reactive element to the load network, a free design parameter can be defined and the design space of the load network parameters are expanded. The design equations of the idealized waveforms and the optimum values of the load network components are derived in detail, and the performance of the peak drain voltage, maximum operating frequency, and power output capability can be improved. In addition, with the expanding space of load network, the generalized PC Class-E/F₃ structure exhibits broadband capability. A matching method with the real frequency technique (RFT) and the de-embedding technique is presented to design the optimal broadband matching network. To verify the validity of the proposed method, a broadband high-efficiency PA working from 1.7 to 2.6 GHz (fractional bandwidth of 42%) is designed. The experimental results of the fabricated PA present high-efficiency characteristics of 68.5%-81% drain efficiency and 62%-75.8% power-added efficiency with 38.8-40.5 dBm output power over the whole operation bandwidth.