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<mml:math display="inline"><mml:mi>k</mml:mi></mml:math>k <mml:math display="inline"><mml:mrow><mml:msub><mml:mrow><mml:mtext>Gd</mml:mtext></mml:mrow><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>Gd2O3 films deposited on polycrystalline silicon treated with different post rapid thermal annealing (RTA) temperatures were formed as high- <mml:math display="inline"><mml:mi>k</mml:mi></mml:math>k interdielectrics. A combinational electrical and material analysis on the samples was performed to obtain a thorough understanding of annealing effect on the high- <mml:math display="inline"><mml:mi>k</mml:mi></mml:math>k <mml:math display="inline"><mml:mrow><mml:msub><mml:mrow><mml:mtext>Gd</mml:mtext></mml:mrow><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>Gd2O3 interdielectrics. The annealing temperature at <mml:math display="inline"><mml:mrow><mml:mn>900</mml:mn><mml:mo>°</mml:mo><mml:mi mathvariant="normal">C</mml:mi></mml:mrow></mml:math>900°C was the optimal condition to reduce the defects and interface traps and hence improve material quality to fabricate a well-crystallized film. This high- <mml:math display="inline"><mml:mi>k</mml:mi></mml:math>k <mml:math display="inline"><mml:mrow><mml:msub><mml:mrow><mml:mtext>Gd</mml:mtext></mml:mrow><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub><mml:msub><mml:mi mathvariant="normal">O</mml:mi><mml:mrow><mml:mn>3</mml:mn></mml:mrow></mml:msub></mml:mrow></mml:math>Gd2O3 interdielectric shows promise for future generation of nonvolatile memory applications.No biography provided yet