Isolated current sensing is fundamental in several contexts, including power electronics, automotive, and smart buildings. In order to meet the requirements of modern applications, current sensors should feature ever larger bandwidth and dynamic range, as well as reduced power consumption and dimension. Among the available current sensing technologies, Hall-based current sensors have gained an increased popularity owing to their advantages in terms of size, economic feasibility, low power consumption, high dynamic range, and integrability with standard CMOS technologies. This tutorial aims at providing a comprehensive insight into the interdisciplinary world of Hall-effect current sensors, encompassing the fundamental principles of operation, the design of the semiconductor device, the implementation techniques, as well as the methods for sensor modeling and characterization. In particular, this manuscript focuses on Hall-effect sensors realized on standard silicon technologies, and it reviews some typical architectures for the transduction of the measurand current into a magnetic field, as well as the electronic front-end. While this tutorial is mainly addressed to students and non-expert readers, specific design aspects and dispersion effects due to temperature and other external phenomena are also discussed.

This paper presents the X-Hall sensor, a viable sensing architecture for implementing a silicon-integrated, broadband, current/magnetic sensor. The X-Hall sensor overcomes the bandwidth limit of the state-of-the-art Hall sensors by replacing the spinning-current technique with DC-biased-based, passive offset compensation. In this way, the X-Hall architecture removes the methodological bandwidth limit due to the spinning-current technique and allows for exploiting the Hall probe up to its practical limit, which is set by the parasitic capacitive effects. Moreover, the X-Hall architecture allows to push the practical bandwidth limit at higher frequencies due to both the removal of the switches inherent in the spinning-current approach and a specifically designed analog front-end. To this end, a differential-difference current-feedback amplifier (DDCFA) is proposed as analog front-end in the X-Hall sensor. A prototype of the proposed X-Hall architecture is implemented in BCD 0.16-μm silicon technology to experimentally assess the performance of the X-Hall architecture. The passive offset compensation implemented into the X-Hall architecture is frequency independent and preserves an adequate offset reduction performance, though less efficient than the spinning-current technique operated at low frequency. Experimental dynamic tests on the prototype identify the presence of an additive parasitic dynamic perturbation due to the package that prevents from fully exploiting the X-Hall prototype up to its designed bandwidth limit. However, the implementation of a post de-emphasis digital filter allows to mitigate for the dynamic perturbation and to experimentally achieve a sensor bandwidth of 4 MHz, which is the broadest bandwidth ever demonstrated by a purely Hall-effect based sensor.

This article deals with the characterization of charge trapping dynamics in a novel 100-nm double-heterojunction AlN/GaN/AlGaN-on-Si radio frequency (RF) HEMT process. In order to study the detrapping mechanisms, we perform the wideband acquisitions of the transient behavior by sweeping the pulsed voltages to cover the entire device operating area. The fast acquisition also enables the characterization of the charge capture behavior, a key aspect for RF performance. From the analysis of the drain current transients, time constants are extracted, showing a fundamental release time constant in the order of 0.1–1 ms, and more than one capture constants, the fastest being in the order of 300 ns. To the best of authors’ knowledge, this is the first time that trapping dynamics under large-signal regime are characterized for this type of process.

A state-space empirical nonlinear model for GaN-based field-effect transistors (FETs) is defined, along with the associated identification procedures based on a recently published double pulse measurement technique. Charge trapping phenomena are dealt with in terms of a nonlinear state equation, which describes the rate of change of the trap state as a function of its actual distance from the corresponding steady state. Model experimental validation is carried out, after on-wafer characterization of a 1-mm AlGaN-GaN on SiC FET, both under strong and mild nonlinear operation.

This paper presents a novel empirical model for gallium nitride on silicon carbide high-electron mobility transistors. A global state-space formulation describes charge trapping effects by means of suitable 2-D nonlinear lag functions of the applied voltages, extracted from a reduced set of double-pulse current-voltage characteristics. The implementation in CAD tools involves a simple equivalent circuit and lookup tables, making the model well suited for power amplifier design in the presence of signals of practical interest. An extensive validation at both low (4 MHz) and radio frequencies (5.5 GHz) exhibits good accuracy and a robust performance prediction for the operation above the cut-off of dispersive phenomena, across different operating classes and loads, in terms of output power, power-added efficiency, and third-order intermodulation distortion. These results show that traps with both linear and nonlinear dynamics are stimulated in large-signal operation, and that these must be taken into account for global model predictions.

Charge trapping effects represent a major challenge in the performance evaluation and the measurement-based compact modeling of modern short-gate-length (i.e., ≤0.15 μm) Gallium Nitride (GaN) high-electron mobility transistors (HEMT) technology for millimeter-wave applications. In this work, we propose a comprehensive experimental methodology based on multi-bias large-signal transient measurements, useful to characterize charge-trapping dynamics in terms of both capture and release mechanisms across the whole device safe operating area (SOA). From this dataset, characterizations, such as static-IV, pulsed-IV, and trapping time constants, are seamlessly extracted, thus allowing for the separation of trapping and thermal phenomena and delivering a complete basis for measurement-based compact modeling. The approach is applied to different state-of-the-art GaN HEMT commercial technologies, providing a comparative analysis of the measured effects.