In this article, a 4H-SiC metal-insulator-semiconductor-insulator-metal (MISIM) ultraviolet (UV) photodetector (PD) with a normal working temperature up to 550 °C, has been successfully fabricated and characterized for the first time. At 550 °C, the dark current of our fabricated MISIM remains at ~0.2 nA level and a record photo-to-dark current ratio (PDCR) of 62.7 is achieved at a reverse bias voltage of −15 V. Under 275 nm illumination, high responsivity (R) of 0.23 and 0.54 A/W have been achieved at room temperature (RT) and 550 °C, respectively. To the best of our knowledge, this is the best result reported for high-temperature UV detectors based on the 4H-SiC. This work is significant for developing high-temperature 4H-SiC-based UV PDs.

A junction termination method adopting heavily doped p-well rings with a shallow trench for each ring, named as a trench multiple floating limiting rings (TMFLRs), is analyzed and fabricated without any additional process in 4H-SiC junction barrier Schottky diode. A breakdown voltage of 6.7 kV is achieved using TMFLRs structure on an epitaxial layer with thickness of 50 μm, while the breakdown voltage of the conventional planar FLRs structure with the same termination area is only 5.7 kV. The experimental result has demonstrated that the TMFLRs termination structure yields about 90% of the parallel plane breakdown voltage. In addition, the simulation results show that the TMFLRs make the bulk peak electric field (E _pbulk ) reduce and move away from the device surface, successfully making the interface peak electric field (E _p,interface ) decrease by about 30% compared with a conventional planar FLRs structure when same reverse voltages applied.

In this letter, an ultrahigh-temperature 4H-SiC Schottky ultraviolet (UV) photodiode (PD) using oxygen plasma pre-treatment (OPT) technology has been successfully fabricated and characterized. The PD has a high Schottky barrier height (SBH) of 1.94 eV. It shows excellent tolerance to extreme temperature with a dark current of $2.7\times 10\,\,^{\mathbf {-8}}$ A at −25 V and 600 °C. Under UV illumination, a record operating temperature of 600 °C is realized for the first time (PDCR = 3.5 at 600 °C, −25 V). Of note, the fabricated PD exhibits high responsivity that increases with the operating temperature from 0.17 A/W at room temperature (RT) to 0.52 A/W at 600 °C, at −25 V and 275-nm. Moreover, an expeditious response time of ms level is also realized from RT to 600 °C. These results demonstrate that the proposed 4H-SiC Schottky PD is advantageous for high-temperature UV-related applications.

This paper reports the demonstration of a high performance 4H-SiC floating junction barrier Schottky (FJ_JBS) rectifier with a 30μm, 6×1015 cm-3-doped epitaxial layer. Extensive simulations have been performed to design, optimize and analyze the structure of the FJ_JBS rectifier. The fabricated FJ_JBS shows that breakdown voltage (BV) and differential Ron,sp are 3.4 kV, yielding the highest BV value reported for 4H-SiC FJ diodes, and 5.67 mΩ·cm2, respectively. Compared with the conventional JBS, the BV value of FJ_JBS increases by 33.3% and the Ron,sp only slightly rises by 6.2%. The corresponding Baliga figure-of-merit (BFOM) (4BV2/Ron-sp) of this FJ_JBS diode is 8.16 GW/cm2.

In this letter, planar floating limiting rings (FLRs) and trench FLRs with different trench depths for the 4H-SiC junction barrier Schottky (JBS) rectifiers are analyzed and compared with simulations and experiments. Compared with the planar FLRs, the experimental results present that the first ring spacing window that termination efficiency exceeds 80% of the parallel plane breakdown voltage (BV) can be widened and termination area can be reduced at the same BV by adopting the trench FLRs. The simulations also indicate that there is an optimal trench depth for the trench FLRs and a smaller sidewall angle can achieve better device performance. Additionally, the repetitive avalanche current stress measurements imply that the trench FLRs has better robustness regarding the BV shift, achieving better device reliability.

In this letter, for the first time, a high-performance picosecond 4H-SiC diode avalanche shaper (DAS) with a novel ${p^+/p^-/n^+}$ multilayer epitaxial structure is experimentally demonstrated and characterized. For fabrication of our 4H-SiC DAS, the multilayer epitaxial stacks have been designed in detail and grown using continuous multilayer epitaxial wafer growth. To excite the delayed avalanche breakdown (DAB) effect, the electric field profile in multilayer epitaxial stacks has been numerically simulated in detail to suppress the surface electric field crowding and premature breakdown during the overvoltage pulse applied. A 2.5-kV, 1-ns pulsed power generator is adopted to drive our fabricated SiC DAS, the output on a 50 $\Omega$ load is 1860 V, 100 ps, lead a voltage rise rate of 11.14 kV/ns, and a peak power density of 62 MW/cm $^2$ . Furthermore, the fabricated SiC DAS operates stably in multipulse mode at 1 MHz. To the best of our knowledge, this is the first experimental result reported for picosecond DAS based on the 4H-SiC. This article is significant for developing 4H-SiC-based ultrafast closing switches.