Background: Corybas taliensis is an endemic species of sky islands in China. Its habitat is fragile and unstable, and it is likely that the species is threatened. However, it is difficult to determine the conservation priority or unit without knowing the genetic background and the overall distribution of this species. In this study, we used double digest restriction-site associated DNA-sequencing (ddRAD-seq) to investigate the conservation genomics of C. taliensis. At the same time, we modeled the extent of suitable habitat for C. taliensis in present and future (2030 and 2090) habitat using the maximum-entropy (MaxEnt) model. Results: The results suggested that the related C. fanjingshanensis belongs to C. taliensis and should not be considered a separate species. All the sampling locations were divided into three genetic groups: the Sichuan & Guizhou population (SG population), the Hengduan Mountains population (HD population) and Himalayan population (HM population), and we found that there was complex gene flow between the sampling locations of HD population. MT was distinct genetically from the other sampling locations due to the unique environment in Motuo. The genetic diversity (π, He) of C. taliensis was relatively high, but its contemporary effective population size (Ne) was small. C. taliensis might be currently affected by inbreeding depression, although its large population density may be able to reduce the effect of this. The predicted areas of suitable habitat currently found in higher mountains will not change significantly in the future, and these suitable habitats are predicted to spread to other higher mountains under future climate change. However, suitable habitat in relatively low altitude areas may disappear in the future. This suggests that C. taliensis will be caught in a ‘summit trap’ in low altitude areas, however, in contrast, the high altitude of the Himalaya and the Hengduan Mountains are predicted to act as ‘biological refuges’ for C. taliensis in the future. Conclusions: These results not only provide a new understanding of the genetic background and potential resource distribution of C. taliensis, but also lay the foundation for its conservation and management.
24 November 2025 in IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Chiplet technology has emerged as a transformative approach in integrated circuit design. Although it has attracted significant attention recently, there has been limited effort dedicated to clearly defining its concept, terminology, composition, and evolution phases etc. This survey paper gives a formal definition by proposing chiplet terminology and composition, name it as a new design methodology, then analyze over 200 recent publications from both academia and industry to establish chiplet as a technology domain composed of four distinct fields: chiplet-based SoC architecture, interconnect, EDA tools, and advanced packaging. For each field composing chiplets, the paper traces the technology development, analyze challenges, outline the evolution trend and challenges. This survey aims to provides an in-depth examination of chiplet domain and each field’s progress, offering insights drawn from literature analysis to outline the current and emerging landscape of chiplet technology.
Thin-film photovoltaic technology has begun to be applied in building-integrated photovoltaics (BIPVs), and it is believed that thin-film photovoltaic technology has potential in building-integrated photovoltaic applications. In this paper, a hybrid approach was investigated which combined the maximum power point tracking (MPPT) algorithm of three-stage variable step size with continuous conduction mode (CCM)/discontinuous current mode (DCM). The research contents of this paper include the principle analysis of the maximum power point tracking algorithm, the design of the sampling period, and the design of a double closed-loop control system and correction factor. A system model was built in MATLAB/Simulink, and a comparative simulation was carried out to compare the performance of the proposed method with some traditional methods. The simulation results show that the proposed approach has the ability to fast-track and make the system run stably. Furthermore, it can make the system respond quickly to environmental changes. An experimental platform was built, and the experimental results validated and confirmed the advantages of the proposed method.
27 March 2020 in Journal of Computer Science and Technology
As the paradigm of cloud computing, a datacenter accommodates many co-running applications sharing system resources. Although highly concurrent applications improve resource utilization, the resulting resource contention can increase the uncertainty of quality of services (QoS). Previous studies have shown that achieving high resource utilization and high QoS simultaneously is challenging. Moreover, quantifying the intensity of interference across multiple concurrent applications in a datacenter, where applications can be either latency-critical (LC) or best-effort (BE), poses a significant challenge. To address these issues, we propose Ah-Q, which comprises a series of theorems, a quantification theory and a scheduling strategy. Firstly, we present the necessary and sufficient conditions to precisely test whether a datacenter is both QoS guaranteed and high-throughput. We also present and prove a theorem that reveals the relationship between tail latency and throughput. Our theoretical results are insightful and useful for building datacenters that have desirable performance. By applying our theoretical results, datacenter architects can more effectively balance the trade-off between resource utilization and QoS, leading to improved performance for co-running applications. Secondly, we propose the “System Entropy” (E $\rm {_{S}}$ ) theory to quantitatively and analytically measure interference in a datacenter. Interference arises due to resource scarcity or irrational scheduling, and effective scheduling can alleviate resource scarcity. To assess the effectiveness of a resource scheduling strategy, we introduce the concept of “resource equivalence”. We evaluate various resource scheduling strategies to demonstrate the correctness and effectiveness of the proposed theory. Thirdly, we introduce a new resource scheduling strategy, ARQ, that leverages both isolation and sharing of resources. Our evaluations show that ARQ significantly outperforms state-of-the-art strategies PARTIES and CLITE in reducing the tail latency of LC applications and increasing the IPC of BE applications.
Given the memory wall, the performance of the memory system significantly influences the user experience of mobile phones. The system cache (SC), located on the memory side, is shared among all CPUs and GPUs within the mobile phone, serving as the last line of defense before resorting to time-consuming off-chip memory access. Managing SC is a challenge due to its large working set and irregular access patterns. Despite occupying a substantial on-chip area, SC's effectiveness in terms of hit rate is relatively low. It has been observed that neither state-of-the-art cache replacement policies nor increasing cache size significantly improve SC performance. Prefetchers designed for higher-level caches cannot be seamlessly applied to SC due to the absence of the required program counter (PC) on the memory side and the violation of stringent power constraints in mobile phones by aggressive prefetch traffic. In this study, we present Planaria, comprising two sub-prefetchers (SLP and TLP) and a coordinator, aiming to achieve high accuracy and coverage simultaneously. The two sub-prefetchers exploit intra- and inter-page regularities through self and transfer learning, respectively. The coordinator explicitly decouples the learning and issuing phases of the sub-prefetchers. Experimental results demonstrate that Planaria has enhanced overall system performance in terms of instructions per cycle (IPC) by an average of 28.9%, 21.9%, and 15.3% over no prefetcher, BOP, and SPP, respectively. Moreover, Planaria proves to be power-efficient, incurring only a 0.5% increase in power consumption, while BOP and SPP increase power consumption by 13.5% and 9.7%, respectively.