This paper presents a method for rapid detection of faults on voltage source converter multiterminal HVdc transmission networks using multipoint optical current sensing. The proposed method uses differential protection as a guiding principle, and is implemented using current measurements obtained from the optical current sensors distributed along the transmission line. Performance is assessed through detailed transient simulation using MATLAB/Simulink models, integrating inductive dc-line terminations, detailed dc circuit-breaker models, and a network of fiber-optic current sensors. Moreover, the feasibility and required performance of optical-based measurements is validated through laboratory testing. Simulation results demonstrate that the proposed protection algorithm can effectively, and within very short period of time, discriminate between faults on the protected line (internal faults), and those occurring on adjacent lines or busbars (external faults). Hardware tests prove that the scheme can be achieved with the existing, available sensing technology.

Speed and selectivity of DC fault protection are critical for High-Voltage DC (HVDC) grids and present significant technical and economic challenges. Therefore, this paper proposes a non-unit protection solution that detects and discriminates DC faults based on frequency domain analysis of the transient period of DC faults. The representation of a generic HVDC grid section and the corresponding DC-side fault signatures in the frequency domain form the basis of a generalized approach for analytically designing a protection scheme based on Wavelet Transform (WT). The proposed solution is adaptive within its design stage and offers general applicability and immunity to system changes, while the protection settings are configured for optimized performance. The scheme is validated through offline simulations in PSCAD/EMTDC and the technical feasibility of the algorithm in the real world is demonstrated through the use of real-time digital simulation (using RTDS) and Hardware-in-the-Loop (HIL) testing. Both offline and real-time simulations demonstrate that the scheme is able to detect and discriminate between internal and external faults at a significantly high speed, while remaining sensitive to high impedance faults and robust to external disturbances and outside noise.

This paper describes the operating principles and theoretical relationships that underpin the modelling and control system of the enhanced modular multilevel converter (EMMC). A full-scale model of a point-to-point HVdc link that employs EMMCs is used to examine its performance during normal operation in all four quadrants, and resiliency to symmetrical and asymmetrical ac and dc faults. Results of exhaustive simulation studies reveal that the improved ac and dc power qualities, which are achieved by incorporation of a few full-bridge cells into the arms of conventional half-bridge modular multilevel converter (HB-MMC) with medium-voltage cells to create the EMMC do not affect its ac and dc fault ride-through capability nor its dynamics during normal operation as active and reactive power set-points being varied. In addition, a variant of the EMMC is proposed, in which the number of full-bridge cells to be added into the arms of HB-MMC could be increased to offer bespoke features beyond that explicitly defined in original vision of the EMMC, such as reduced dc voltage operation during pole-toground dc fault, and potential extension of fault clearance times in multi-terminal HVdc grids. Moreover, the validity of the new variant has been confirmed using results obtained from highfidelity HVdc link models developed in EMPT-RV platform, in which the EMMCs are replaced by the proposed variant.

Successful deployment of High-Voltage Direct Current (HVDC) grids necessitates effective DC fault handling strategies, which can minimize the severe consequences caused by DC faults on the AC and DC side of the HVDC grids. Therefore, this paper investigates the enhanced DC fault performance of the Customized Hybrid Modular Multilevel Converter (CH-MMC), in which a limited number of full-bridge sub-modules (FB-SMs) is added into the arms of the conventional MMC in an effort to significantly extend the timespan between fault inception and fault clearance, thus allowing the use of relatively slow and cheaper DC circuit breakers. Based on this converter, a dedicated DC fault handling strategy for CH-MMC based HVDC grids is proposed, which aims to improve the fault resiliency and security of HVDC grids for pole-to-pole faults. Moreover, the proposed DC fault management strategy guarantees the continuous operation of the grid during pole-to-ground DC faults, including full reactive power provision from the converter stations. The performance of the strategy is demonstrated using comprehensive electromagnetic transient (EMT) simulation studies conducted on an illustrative four-terminal meshed HVDC grid, which consider a range of scenarios with different fault current limiting inductors and DC circuit breaker operation times.

This paper presents an alternative implementation of a modular multilevel converter (MMC) that generates a large number of voltage levels per phase with high resolution voltage steps from a reduced number of cells per arm. The presented MMC employs a half-bridge chain-link of medium-voltage cells and a full-bridge chain-link of low-voltage cells in each of its arms. The total blocking voltage of the full-bridge chain-link is equivalent to half that of the medium-voltage half-bridge cell. The use of half and full-bridge cells with two distinct rated voltages in each arm permits full exploitation of the full-bridge cells to generate high resolution multilevel voltage waveforms with fine stepped transitions between major voltage steps of the medium-voltage half-bridge cells. In this manner, errors in the synthesis of the common-mode voltages of the three phase legs due to switching of the cell capacitors in and out the power path are reduced. The nested multilevel operation of the proposed MMC results in a number of voltage levels which is related to the product, rather than the sum, of the numbers of half and full-bridge cells. Detailed comparisons with existing MMC implementations show that the proposed MMC implementation offers the best design trade-offs (superior AC and DC waveforms with reduced control and power circuit complexity). The validity of the proposed MMC implementation is confirmed using simulations and experimentally.