This paper proposes the enhancement of the control of a grid-connected inverter by a Simplified Virtual Synchronous Compensator (S-VSC) model working in parallel with the traditional inverter current control loops. The goal of the integration of this model into the inverter control scheme is to provide grid services, such as virtual inertia behavior, current harmonic compensation, as well as reactive grid support during faults. The S-VSC is only in charge of providing the aforementioned services, working therefore always at a low power level. On the other hand, the main power references are sent directly to the inverter control loops. This way, a more stable and damped operation of the inverter is obtained. The proposed structure has been implemented on a 15 kVA grid-connected inverter for experimental validation.
11 July 2023 in IEEE Transactions on Industry Applications
Traditional power systems based on synchronous generators often feature low frequency electromechanical oscillations. However, the integration of renewable energy sources through power converters can help tackling this issue. In fact, thanks to the concept of virtual synchronous machine (VSM), it is possible to make the inverters behave as real synchronous machines (SMs). This way, the inverters can be integrated into the grid as traditional SMs and can even outperform them when it comes to damping low frequency oscillations in the power system. To do that, proper damping algorithms must be adopted in the VSM model. Therefore, this paper presents a simple and straightforward damping method for VSMs based on a single lead-lag filter acting on the VSM active power feedback. The proposed method and its integration in the VSM model are described. Moreover, a comparison method and four performance indices are proposed, to better evaluate the performance of the VSM damping methods. Finally, the proposed solution has been experimentally compared to five conventional methods to highlight its features according to the proposed performance indices.
The efficiency and power density improvement of power switching converters play a crucial role in energy conversion. In the field of motor control, this requires an increase in the converter switching frequency together with a reduction in the switching legs’ dead time. This target turns out to be complex when using pure silicon switch technologies. Gallium Nitride (GaN) devices have appeared in the switching device arena in recent years and feature much more favorable static and dynamic characteristics compared to pure silicon devices. In the field of motion control, there is a growing use of GaN devices, especially in low voltage applications. This paper provides guidelines for designers on the optimal use of GaN FETs in motor control applications, identifying the advantages and discussing the main issues. In this work, primarily an experimental evaluation of GaN FETs in a low voltage electrical drive is carried out. The experimental investigation is obtained through two different experimental boards to highlight the switching legs’ behavior in several operative conditions and different implementations. In this evaluative approach, the main GaN FETs’ technological aspects and issues are recalled and consequently linked to motion control requirements. The device’s fast switching transients combined with reduced direct resistance contribute to decreased power losses. Thus, in GaN FETs, a high switching frequency with a strong decrease in dead time is achievable. The reduced dead time impact on power loss management and improvement of output waveforms quality is analyzed and discussed in this paper. Furthermore, input filter capacitor design matters correlated with increasing switching frequency are pointed out. Finally, the voltage transients slope effect (dv/dt) is considered and correlated with low voltage motor drives requirements.
As a consequence of the exponential growth of the electric vehicle (EV) market, DC fast-charging infrastructure is being rapidly deployed all around the world. Ultra-fast charging (UFC) stations are starting to pose serious challenges to the electric power system operation, mostly due to their high peak power demand and unregulated discontinuous operation. To address these issues, local energy storage can be installed, ensuring a smoother grid power absorption profile and allowing to provide grid-supporting features. In this work, a control solution for the grid-side AC/DC converter of next-generation EV UFC stations is proposed. A virtual synchronous compensator (VSC) control algorithm is implemented, in order to lessen the impact of the charging station on the utility and to provide the full spectrum of grid ancillary services (i.e., frequency regulation, reactive power compensation, harmonic reduction, short circuit current generation, etc.). The proposed control strategy is verified experimentally on a downscaled 15 kVA three-phase inverter, emulating the grid front-end of the charging station.
18 January 2022 in IEEE Transactions on Power Electronics
Many industrial applications are recently utilizing the advantages of a common dc-bus-based multiple-drive (multidrive) system, such as low installation cost, space savings as well as improved reliability, and flexibility. One of the main drawbacks of such systems is the requirement for a bulky dc capacitor due to the presence of large dc-link current ripples from the harmonic interaction between these multidrive and pulsewidth modulation (PWM) switching. This problem not only increases the cost and volume of the dc-link capacitors but also decreases its lifetime, which must be considered in the design from the industrial aspect. This article proposes a new dc-bus capacitor design method for a multidrive system, focused on the capacitor sizing, cost reduction, and lifetime improvements. First, an analytical model to obtain the dc-link capacitor current in a multidrive system is proposed, which would aid the designers to configure the dc-capacitor current in systems having numerous multiple drives. Next, using the developed analytical model, the dc-link current harmonics are reduced through optimal interleaving of the fundamental output currents in addition to the phase shifting of the carrier waves of the parallel connected inverters. Finally, new capacitor sizing/design is proposed considering the lifetime, power loss, cost, and volume of the dc-link capacitor bank. The proposed approach reduces the volume and cost of dc-cap bank by 50%, and increases the lifetime by four years ($\sim$35 000 h), considering the worst-case scenarios. Experimental and analytical results are given for validation of the proposed method. The results could serve as a guideline for designing the dc-link capacitor in multidrive applications in a low-cost manner.