This paper presents detailed thermal analyses and modeling of multi-chip power modules. For the first time, a fair thermal comparison between the widespread single-sided cooled (SSC) technology and the innovative double-sided cooled (DSC) one is presented. The latter solution emerges among all packaging techniques thanks to its improved electrical performances and mechanical reliability. The investigation is carried out by means of 3-D finite-element method thermal simulations automated by an in-house routine. The power modules under test are thoroughly studied in a wide range of boundary conditions in order to support (i) the choice of an appropriate cooling strategy and (ii) the comprehension of the heat spreading effect occurring in such domains. In addition, attention is paid to the dynamic behavior. Thermal modeling strategies are then proposed and discussed. As a main finding, no relevant thermal discrepancies were observed in the two PM technologies. In most of the boundary conditions, the SSC PM enjoys an enhanced heat spreading effect leading to a better thermal behavior with respect to the DSC counterpart, the adoption of which is justified only in presence of excellent cooling systems.

This paper discusses the benefits of an advanced highly-efficient approach to static and dynamic electrothermal simulations of multicellular silicon carbide (SiC) power MOSFETs. The strategy is based on a fully circuital representation of the device, which is discretized into an assigned number of individual cells, high enough to analyze temperature and current nonuniformities over the active area. The cells are described with subcircuits implementing a simple transistor model that accounts for the utmost influence of the traps at the SiC/SiO₂ interface. The power-temperature feedback is emulated with an equivalent network corresponding to a compact thermal model automatically generated by the FANTASTIC tool from an accurate 3D mesh of the component under test. The resulting macrocircuit can be solved by any SPICE-like simulation program with low computational burden and rare occurrence of convergence issues.

In this paper, an advanced electrothermal simulation strategy is applied to a 3.3 kV silicon carbide MOSFET power module. The approach is based on a full circuital representation of the module, where use is made of the thermal equivalent of the Ohm’s law. The individual transistors are described with subcircuits, while the dynamic power-temperature feedback is accounted for through an equivalent thermal network enriched with controlled sources enabling nonlinear thermal effects. A synchronous step-up DC-DC converter and a single-phase inverter, both incorporating the aforementioned power module, are simulated. Good accuracy was ensured by considering electromagnetic effects due to parasitics, which were experimentally extracted in a preliminary stage. Low CPU times are needed, and no convergence issues are encountered in spite of the high switching frequencies. The impact of some key parameters is effortlessly quantified. The analysis witnesses the efficiency and versatility of the approach, and suggests its adoption for design, analysis, and synthesis of high-frequency power converters in wide-band-gap semiconductor technology.

In this paper, the dc electrothermal behavior of InGaP/GaAs HBT test devices and arrays for power amplifier output stages is extensively analyzed through an efficient simulation approach. The approach relies on a full circuit representation of the domains, which accounts for electrothermal effects through the thermal equivalent of the Ohm’s law and can be solved in any commercial circuit simulator. In particular, the power-temperature feedback is described through an equivalent thermal network automatically obtained by (i) generating a realistic 3-D geometry/mesh of the domain in the environment of a numerical tool with the aid of an in-house routine; (ii) feeding the geometry/mesh to FANTASTIC, which extracts the network without performing simulations. Nonlinear thermal effects adversely affecting the behavior of devices/arrays at high temperatures are included through a calibrated Kirchhoff’s transformation. For the test devices, the thermally-induced distortion in I–V curves is explained, and the limits of the safe operating regions are identified for a wide range of bias conditions. A deep insight into the electrothermal behavior of the arrays is then provided, with particular emphasis on the detrimental nonuniform operation. Useful guidelines are offered to designers in terms of layout and choice of the ballasting strategy.

This paper presents a comprehensive overview of nonlinear thermal effects in bipolar transistors under static conditions. The influence of these effects on the thermal resistance is theoretically explained and analytically modeled using the single-semiconductor assumption. A detailed review of experimental techniques to extract the thermal resistance as a function of backside temperature and/or dissipated power from DC measurements is provided; advantages, underlying approximations, and limitations of all methods are clarified, and guidelines for their correct application are given. Accurate FEM thermal simulations of an InGaP/GaAs and a Si/SiGe HBT are performed to verify the accuracy of the single-semiconductor theory. The thermal resistance formulations employed in the most popular compact bipolar transistor models for circuit simulators are investigated, and it is found that they do not properly describe nonlinear thermal effects. Alternative implementations of the more accurate single-semiconductor theory are then proposed for the future versions of the compact models.