Jean-Pierre David

Dr. Jean-Pierre David

orcid

Research Focus & Metrics

Academic Career Length

23Years (2004-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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31 July 2020 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
ATAref Trigui
Aref Trigui
Mohamed AliMohamed Ali
Mohamed Ali
SHSami Hached
Sami Hached
JDJean-Pierre David
Jean-Pierre David
Ahmed Chiheb AmmariAhmed Chiheb Ammari
Ahmed Chiheb Ammari
Mohamad SawanMohamad Sawan
Mohamad Sawan
This paper presents a wireless power and downlink data transfer system for medical implants operating over a single 10 MHz inductive link. The system is based on a Carrier Width Modulation (CWM) scheme for high-speed communication and efficient power delivery using a novel modulator circuit design. Unlike conventional modulation techniques, the data rate of the proposed CWM is not limited by the quality factors of the primary and secondary coils. The functionality of the new modulation method is proven using a hybrid implementation comprising a custom-integrated demodulator circuit and board-level discrete components. The proposed Wireless Power and Data Transfer (WPDT) system is also capable of operating under a wide range of data rates. It allows a maximum data rate of 3.33 Mb/s for a maximum power delivery of 6.1 mW at 1 cm coils separation distance. The system can recover more power, reaching 55 mW at 100 kb/s. Due to the system genericity, an operator can select the best compromise between power and data rates in accordance to application or current need, without reconfiguring the receiver. Another advantage of this modulation technique is the simple implementation and the ultra-low power consumption of the CWM demodulator despite its high-speed demodulation.

26 September 2012 in Mathematics and Computers in Simulation
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Journal Article
Closed access
Tarek Ould-BachirTarek Ould-Bachir
Tarek Ould-Bachir
CDC. Dufour
C. Dufour
JBJ. Bélanger
J. Bélanger
JMJ. Mahseredjian
J. Mahseredjian
JDJean-Pierre David
Jean-Pierre David

1 May 2012
Verified
Conference Paper
Closed access
Tarek Ould-BachirTarek Ould-Bachir
Tarek Ould-Bachir
DCDUFOUR Christian
DUFOUR Christian
JBJean Belanger
Jean Belanger
JMJean Mahseredjian
Jean Mahseredjian
JDJean-Pierre David
Jean-Pierre David
Hardware-in-the-loop (HIL) simulation is an industrial practice that consists in testing a physical electronic control unit (ECU) against a real-time simulated model of a plant. Typical PWM applications run in the kHz range and can hardly be simulated using standard methods with the typical CPU time-steps that are at best in the 5-10 microseconds range. Migrating the computational load from a CPU to a Field Programmable Gate Array (FPGA) allows overcoming the limitation and achieving time-steps in the sub-microsecond range. Our work investigates the feasibility of hardware calculation engines intended for the FPGA-based HIL simulation using commercial floating-point cores, and using parallel multi-cycle multiply-accumulators (MACs). The effectiveness of the proposed multi-cycle accumulation scheme is here confirmed by considering a real-world application case study, that is a model of a permanent magnet synchronous motor (PMSM) driven by a three-phase two-level Insulated-Gate Bipolar Transistor (IGBT) inverter. Time-steps of 80 ns for the PMSM and 240 ns for the two-level inverter are reported. Simulation results are validated using the SimPowerSystems Matlab library with a 20 kHz PWM.

24 October 2019
Verified
Book Chapter
Closed access
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MAMohammadHossein AskariHemmat
MohammadHossein AskariHemmat
SHSina Honari
Sina Honari
LRLucas Rouhier
Lucas Rouhier
CPChristian S. Perone
Christian S. Perone
JCJulien Cohen-Adad
Julien Cohen-Adad
JDJean-Pierre David
Jean-Pierre David

21 August 2024 in Electronics
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Journal Article
Open access
PDF file
JEJörg Ehmer
Jörg Ehmer
YSYvon Savaria
Yvon Savaria
BGBertrand Granado
Bertrand Granado
JDJean-Pierre David
Jean-Pierre David
JDJulien Denoulet
Julien Denoulet
In recent years, there has been a tremendous increase in the use of connected devices as part of the so-called Internet of Things (IoT), both in private spaces and the industry. Integrated distributed systems have shown many benefits compared to isolated devices. However, exposing industrial infrastructure to the global Internet also generates security challenges that need to be addressed to benefit from tighter systems integration and reduced reaction times. Machine learning algorithms have demonstrated their capacity to detect sophisticated cyber attack patterns. However, they often consume significant amounts of memory, computing resources, and scarce energy. Furthermore, their training relies on the availability of datasets that accurately represent real-world data traffic subject to cyber attacks. Network attacks are relatively rare events, as is reflected in the distribution of typical training datasets. Such imbalanced datasets can bias the training of a neural network and prevent it from successfully detecting underrepresented attack samples, generally known as the problem of imbalanced learning. This paper presents a shallow neural network comprising only 110 ReLU-activated artificial neurons capable of detecting representative attacks observed on a communication network. To enable the training of such small neural networks, we propose an improved attack-sharing loss function to cope with imbalanced learning. We demonstrate that our proposed solution can detect network attacks with an F1 score above 99% for various attacks found in current intrusion detection system datasets, focusing on IoT device communication. We further show that our solution can reduce the false negative detection rate of our proposed shallow network and thus further improve network security while enabling processing at line rate in low-complexity network intrusion systems.

1 September 2018 in Integration
Verified
Journal Article
Closed access
RCRoberto Sanchez Correa
Roberto Sanchez Correa
JDJean-Pierre David
Jean-Pierre David