Quality of power supply in power distribution systems requires continuous measurement using power quality analyzers installed in the grid. The paper reviews the published methods for optimal location of metering points in distribution systems in the context of power quality metering and assessment. Three methods have been selected for detailed analysis and comparative tests. It has been found that utilization of the methods is possible, but their performance varies highly depending on the test grid’s topology. Since the methods rely on the state estimation approach, their performance is strictly related to observability analysis. It has been found that standard observability analysis used for typical state estimation problem yields ambiguous results when applied to power quality assessment. Inherited properties of the selected methods are also analyzed, which allows for the formulation of general recommendations about optimal selection of metering points in a distribution system.

DVR is a power electronic device designed to maintain constant voltage amplitude, thus protect sensitive loads against voltage dips. This paper presents a new concept of DVR control. The DVR injects the missing voltage, so the load voltage follows the reference voltage. The DVR unit is controlled by a sliding mode controller, and shows very good performance. The DVR maintains a small angle between the load voltage phasor and supply voltage phasor, so the injected active power can be minimized

The article presents utilisation of model-based design (MBD) approach to rapid implementation of power quality (PQ) metering algorithms. Power supply quality is very important aspect of modern power systems and will become even more important in future smart grids. In this case, maintaining the PQ parameters on the desired level will require efficient implementation methods of the metering algorithms. Development of new, advanced PQ metering algorithms requires new hardware with adequate computational capability and time intensive, cost-ineffective manual implementation. As an alternative, MBD approach can be considered. The MBD approach focuses on the modelling and validation of the model by a simulation, which is supported greatly by a computer-aided engineering (CAE) package. The paper presents two algorithms utilised in modern PQ meters: a phase-locked loop based on enhanced phase-locked loop (EPLL) and the flicker measurement according to the IEC 61000-4-15 standard. The algorithms were chosen due to their complexity and nontrivial development and were first modelled in MATLAB/Simulink package, then tested and validated in a simulation environment. Next, the models in the form of the Simulink diagrams were used for automatic generation of C-code. The code is compiled and executed in the real time at the Zynq Xilinx platform which combines reconfigurable field-programmable gate array (FPGA) with a dual-core processor. The MBD development of PQ algorithms, automatic code generation and compilation creates the rapid algorithm prototyping and implementation path for PQ measurements. The main advantage of the approach is the ability to focus on the design, validation and testing stages and skip the implementation issues. The code generation process renders production-ready code which can be easily used at the target hardware. This is especially important in the case when the standards for PQ measurement are in constant development, and the PQ issues in emerging smart grids will require tools for rapid development and implementation of such algorithms.

This paper describes a laboratory-based comparison of power quality class A analyzers, with respect to voltage harmonic distortion measurements. The tested measuring instruments were designed in accordance to the requirements of the IEC 61000-4-30 standard. The purpose of these tests was to assess the dispersion of results of analyzers connected to a common measuring point. The expectation is that simultaneous measurements of the same voltage signal should result in a readings dispersion not greater than ±5% of the measured value. The described tests are part of a complex evaluation of metrological properties of power quality analyzers carried out at the AGH University of Science and Technology, Krakow. Detailed results of harmonic tests, comparisons, and conclusions are presented.

Monitoring power quality (PQ) indicators is an important part of modern power grids’ maintenance. Among different PQ indicators, flicker severity coefficients P_st and P_lt are measures of voltage fluctuations. In state-of-the-art PQ measuring devices, the flicker measurement channel is usually implemented as a dedicated processor subsystem. Implementation of the IEC 61000-4-15 compliant flicker measurement algorithm requires a significant amount of computational power. In typical PQ analysers, the flicker measurement is usually implemented as a part of the meter’s algorithm performed by the main processor. This paper considers the implementation of the flicker measurement as an FPGA module to offload the processor subsystem or operate as an IP core in FPGA-based system-on-chip units. The measurement algorithm is developed and validated as a Simulink diagram, which is then converted to a fixed-point representation. Parts of the diagram are applied for automatic VHDL code generation, and the classifier block is implemented as a local soft-processor system. A simple eight-bit processor operates within the flicker measurement coprocessor and performs statistical operations. Finally, an IP module is created that can be considered as a flicker coprocessor module. When using the coprocessor, the main processor’s only role is to trigger the coprocessor and read the results, while the coprocessor independently calculates the flicker coefficients.