Rafał Kopacz

Mr. Rafał Kopacz

Warsaw University of Technology
+1
orcid

Research Focus & Metrics

Academic Career Length

10Years (2017-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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26 October 2021 in IEEE Transactions on Power Electronics
Verified
Journal Article
Open access
RKRafał Kopacz
Rafał Kopacz
MHMichał Harasimczuk
Michał Harasimczuk
PTPrzemysław Trochimiuk
Przemysław Trochimiuk
GWGrzegorz Wrona
Grzegorz Wrona
JRJacek Rabkowski
Jacek Rabkowski
This article presents a novel control method for a multilevel dc–dc flying capacitor converter for applications in medium voltage range. Quasi-two-level modulation provides the possibility to obtain low flying capacitance even below 1 μF, whereas the triangular current mode controller part enables to achieve zero voltage switching at turn- on for a wide operating range, lowering power losses, and providing the possibility to operate at higher frequencies. The proposed novel control converges the advantages of these both methods leading to very high efficiency with high power density. Performance of the flying capacitor converter with the proposed control method is illustrated with a model-based Saber simulation at first, and then, an experimental model operating at wide frequency range (40 ÷ 250 kHz) and in medium voltage range was designed and constructed. A series of laboratory tests at up to 1.5 kV dc and 10 kW confirmed the noteworthy characteristics of the converter. The voltage between the power devices is balanced and the efficiency achieved reached as high as 99.1%. Therefore, the proposed converter can be competitively employed against classical two-level, as well as three-level and series connection-based counterparts.

1 September 2017
Verified
Conference Paper
Closed access
RKRafał Kopacz
Rafał Kopacz
DPDimosthenis Peftitsis
Dimosthenis Peftitsis
JRJacek Rabkowski
Jacek Rabkowski

6 January 2021 in IEEE Access
Verified
Journal Article
Open access
PTPrzemysław Trochimiuk
Przemysław Trochimiuk
RKRafał Kopacz
Rafał Kopacz
GWGrzegorz Wrona
Grzegorz Wrona
JRJacek Rabkowski
Jacek Rabkowski
This article presents a medium voltage half-bridge circuit where 3.3 kV power switches are built with two 1.7 kV/325 A SiC MOSFETs series-connected inside power modules. Essence of this work is an active balancing method eliminating the voltage imbalances between the devices by means of gate signals modification. The advantage over commonly-used passive snubbers is low cost and limited amount of additional losses. Performance of the half-bridge is illustrated with a model-based Saber simulation at first, then, an experimental full-scale model is designed with on-the-shelf power modules capable operating at power level above 150 kVA. A series of laboratory tests at 1.5 kV DC confirmed reduction of voltage differences across devices in the stack to an acceptable level - the designed system is working correctly despite EMI caused by fast switching transients. Moreover, the observed current and voltage waveforms prove the positive impact of the method as not only voltages but also switching losses are better balanced among the devices. Experimental comparison to a 3.3 kV counterpart shows two times lower turn-off energy, therefore, the presented design with two 1.7 kV SiC MOSFET power modules can beneficently compete not only in terms of lower cost but also switching performance.

23 October 2023 in IEEE Transactions on Power Electronics
Verified
Journal Article
Open access
MHMichał Harasimczuk
Michał Harasimczuk
RKRafał Kopacz
Rafał Kopacz
ATAdam Tomaszuk
Adam Tomaszuk
High power density, high voltage gain soft-switching PWM DC-DC converter with a tapped inductor is proposed in this paper as a front-end for low-voltage sources in energy generation systems. The leakage inductance is incorporated into the resonant tank, decreasing the component count. The use of the boost capacitor connected in series with the secondary windings of the tapped inductor causes high voltage gain at the low turn ratio of the coupled inductor. By incorporating a resonant passive clamp circuit, not only the voltage spikes on the transistor are restrained, but zero-voltage switching of the transistor and zero-current turning-off of the diodes are obtained. The resonant operation results in low power losses in the switches, providing high efficiency in a wide output power range. Owing to soft-switching operation, the transistor can be driven with a high switching frequency, providing a consolidated design of the high power density converter. The principles of operation of the converter were also analyzed theoretically. Finally, the converter is validated through a laboratory model with a power rating of 300 W and a switching frequency of 200 kHz.

1 September 2019
Verified
Conference Paper
Closed access
PTPrzemyslaw Trochimiuk
Przemyslaw Trochimiuk
RKRafał Kopacz
Rafał Kopacz
GWGrzegorz Wrona
Grzegorz Wrona
JRJacek Rabkowski
Jacek Rabkowski

13 January 2024 in Electronics Letters
Verified
Journal Article
Open access
RKRafał Kopacz
Rafał Kopacz
David MenziDavid Menzi
David Menzi
FKFlorian Krismer
Florian Krismer
JRJacek Rabkowski
Jacek Rabkowski
JKJohann Kolar
Johann Kolar
JHJonas Huber
Jonas Huber
High‐power applications with low‐voltage (LV) dc loads, for example, fast charging stations for electric vehicles (EVs), are typically supplied from the medium‐voltage (MV) grid. Aiming for low volume, MVac‐LVdc solid‐state transformers (SSTs) that provide galvanic separation with medium‐frequency transformers (MFTs) are thus considered, which are conventionally realized as two‐stage systems that consist of an ac‐dc power‐factor‐correction (PFC) rectifier and an isolated dc‐dc converter. This letter extends a new single‐stage isolated bidirectional PFC rectifier concept to MV levels, resulting in an SST that performs MVac‐LVdc conversion in a single converter stage and, unlike many modular SST concepts, employs only a single MFT. The SST's primary side operates modular‐multilevel‐converter (MMC) bridge legs, whose input voltages contain large ac components, in the quasi‐two‐level mode to minimize the cell capacitors. The secondary side employs a standard LV three‐phase rectifier, and a dual‐active‐bridge‐(DAB)‐like modulation strategy allows power flow regulation and ensures sinusoidal grid currents. The concept is explained and validated using detailed circuit simulations of an exemplary 1‐MW system operating between a 10‐kV three‐phase grid and an 800‐V dc output. The component stresses are evaluated, and an efficiency of 98.1% and a power density of up to 0.6 kW/dm 3 are estimated.