An emulator circuit of Memristor, Memcapacitor, and Meminductor commonly termed as mem-elements has been demonstrated in this article. The circuit has been realized using the technique of current mode, which provides better performance over voltage mode counterparts. The current mode analog building blocks, along with a few passive components, have been used in the presented circuit implementation. The fingerprint characteristics have been observed in both simulation and experimental results, validating the theoretical analysis. The robustness of the presented design has been supported by performing different types of analysis like process corner, temperature, and non-volatility behavior. The mem-elements emulator design has been simulated using $0.18~\mu \text{m}$ TSMC process parameter, and ±1.2 V power supply has been used. The commercial ICs AD844 and CA3080 are used for the experimental demonstration of the proposed mem-elements design by making a prototype on a breadboard. A layout area of $4829~\mu \text{m}^{2}$ , $8098~\mu \text{m}^{2}$ , and $8061~\mu \text{m}^{2}$ respectively is required for the Memristor, Memcapacitor, and meminductor circuit. The power consumed by the mem-elements circuit is also provided. A chaotic has been implemented using mem-elements to show the usefulness of the emulator design.

This article demonstrates a voltage differencing inverting buffered amplifier (VDIBA)-based resistorless flux-controlled memristor emulator circuit with tunability. Two VDIBA blocks serve as active components, and a grounded capacitor serving as a passive part. The proposed emulator design is devoid of multipliers and resistors through effective utilization of port relationships. Including tunability, the suggested emulator functions in both incremental and decremental modes. It accurately depicts the attributes of an ideal memristor up to 12.7 MHz and consumes a total power of 1.34 mW. The mathematical analysis is substantiated through Cadence simulation in 0.18- $\mu$ m Taiwan Semiconductor Manufacturing Company (TSMC) technology with the supply voltage of $\pm$ 1 V. Nonideal, single/parallel, Monte-Carlo sampling and corner analysis were conducted to confirm circuit resilience. The nonvolatile nature of the presented emulator model has also been included. A breadboard prototype incorporating the ICs CA3080 and LT1193 are built to conduct an experimental demonstration. The experimental findings were consistent with the theoretical expectations and simulation results.

A charge-controlled memcapacitor emulator design based on the current-mode technique has been proposed in this research work. The physical realization of a memcapacitor is an open problem that motivates creating newer designs for memcapacitor emulator circuits. The memcapacitor emulator comprises an operational transconductance amplifier (OTA), an active component and has additional passive elements. Memcapacitor, abstracted to have a (pinched) hysteresis loop, is emulated in this work, can be also observed as a nonlinear capacitor with memory in its physical form. The simulations are carried out using 0.18 μm (Taiwan Semiconductor Manufacturing Company) TSMC technology and a ±1.2 V supply voltage to analyse robustness of design through process corner, temperature variation, and non-volatility. Experimental validations are performed using ICs CA3080 on breadboard. An application of chaotic oscillator and adaptive learning circuit using a memcapacitor emulator circuit is shown as a practical case study.