This paper proposes a charged controlled emulator model for memristor and memcapacitor using second-generation Current Conveyor (CCIIs) and Analog Multiplier (AM). The grounded and floating mem-element circuits have been designed using two CCIIs and one multiplier in addition to some passive components. The grounded type of design requires three resistors and three capacitors while floating design necessitates only two resistors and two capacitors. With the help of a switch, the proposed design can be easily switched into a memristor or memcapacitor. The proposed emulator model has been theoretically analyzed and simulated in PSpice to substantiate the effectiveness and accuracy. The practicability of the circuit has been established using commercially available ICs AD844AN and AD633JN. Non-linear characteristics of the proposed memristor emulator have been used to design a chaotic system.

An emulator circuit of Memristor, Memcapacitor, and Meminductor commonly termed as mem-elements has been demonstrated in this article. The circuit has been realized using the technique of current mode, which provides better performance over voltage mode counterparts. The current mode analog building blocks, along with a few passive components, have been used in the presented circuit implementation. The fingerprint characteristics have been observed in both simulation and experimental results, validating the theoretical analysis. The robustness of the presented design has been supported by performing different types of analysis like process corner, temperature, and non-volatility behavior. The mem-elements emulator design has been simulated using $0.18~\mu \text{m}$ TSMC process parameter, and ±1.2 V power supply has been used. The commercial ICs AD844 and CA3080 are used for the experimental demonstration of the proposed mem-elements design by making a prototype on a breadboard. A layout area of $4829~\mu \text{m}^{2}$ , $8098~\mu \text{m}^{2}$ , and $8061~\mu \text{m}^{2}$ respectively is required for the Memristor, Memcapacitor, and meminductor circuit. The power consumed by the mem-elements circuit is also provided. A chaotic has been implemented using mem-elements to show the usefulness of the emulator design.

This paper presents a 0.5 V fifth-order Butterworth low-pass filter based on multiple-input operational transconductance amplifiers (OTA). The filter is designed for electrocardiogram (ECG) acquisition systems and operates in the subthreshold region with nano-watt power consumption. The used multiple-input technique simplifies the overall structure of the OTA and reduces the number of active elements needed to realize the filter. The filter was designed and simulated in the Cadence environment using a 0.18 µm Complementary Metal Oxide Semiconductor (CMOS) process from Taiwan Semiconductor Manufacturing Company (TSMC). Simulation results show that the filter has a bandwidth of 250 Hz, a power consumption of 34.65 nW, a dynamic range of 63.24 dB, attaining a figure-of-merit of 0.0191 pJ. The corner (process, voltage, temperature: PVT) and Monte Carlo (MC) analyses are included to prove the robustness of the filter.

This paper presents a low-voltage nano-power multiple-input operational transconductance amplifier (MI-OTA) with high linearity performance and increased input voltage swing. The enhanced performances are achieved thanks to employing several techniques as the bulk-driven, source-degeneration, self-cascode and negative conductance along with the concept of the input signal attenuation formed by multiple-input MOS transistor. The MI-OTA is widely tunable that serves for biological signals processing. A 3 ^rd -order Butterworth band-pass filter (BPF) for electrocardiogram (ECG) signal processing with 55.8 dB dynamic rang is presented. The MI-OTA circuit is designed for 0.5V voltage supply and offers a 0.22% total harmonic distortion (THD) for 0.2V _pp input signal with total power consumption of 13.4nW. Extensive simulation results including Monte Carlo analysis and process, voltage, temperature (PVT) corners using the 0.18μm CMOS technology from TSMC confirm the characteristics of the proposed MI-OTA and the filter.